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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 02:29:37 +0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-21 02:29:37 +0400 |
| commit | 6db167dfc013b0e114c81077ac091ba26a69f4ed (patch) | |
| tree | 1978b8a2774e0fdb3690065625b0b5eb84475552 /arch/arm/include/asm/hw_breakpoint.h | |
| parent | 32f9aab8ebd886211a7b3e552753af014c3e5225 (diff) | |
| parent | 9cb543124a2d31af42ce61a4c30765ecc8e5f1fa (diff) | |
| download | linux-6db167dfc013b0e114c81077ac091ba26a69f4ed.tar.xz | |
Merge branch 'for-linus-2' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM updates (part two) from Russell King:
- breakpoint and perf updates from Will Deacon.
- hypervisor boot mode updates from Will.
- support for Power State Coordination Interface via the Hypervisor
- core ARM support for KVM
* 'for-linus-2' of git://git.linaro.org/people/rmk/linux-arm: (32 commits)
KVM: ARM: Add maintainer entry for KVM/ARM
KVM: ARM: Power State Coordination Interface implementation
KVM: ARM: Handle I/O aborts
KVM: ARM: Handle guest faults in KVM
KVM: ARM: VFP userspace interface
KVM: ARM: Demux CCSIDR in the userspace API
KVM: ARM: User space API for getting/setting co-proc registers
KVM: ARM: Emulation framework and CP15 emulation
KVM: ARM: World-switch implementation
KVM: ARM: Inject IRQs and FIQs from userspace
KVM: ARM: Memory virtualization setup
KVM: ARM: Hypervisor initialization
KVM: ARM: Initial skeleton to compile KVM support
ARM: Section based HYP idmap
ARM: Add page table and page defines needed by KVM
ARM: perf: simplify __hw_perf_event_init err handling
ARM: perf: remove unnecessary checks for idx < 0
ARM: perf: handle armpmu_register failing
ARM: perf: don't pretend to support counting of L1I writes
ARM: perf: remove redundant NULL check on cpu_pmu
...
Diffstat (limited to 'arch/arm/include/asm/hw_breakpoint.h')
| -rw-r--r-- | arch/arm/include/asm/hw_breakpoint.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hw_breakpoint.h b/arch/arm/include/asm/hw_breakpoint.h index 01169dd723f1..eef55ea9ef00 100644 --- a/arch/arm/include/asm/hw_breakpoint.h +++ b/arch/arm/include/asm/hw_breakpoint.h @@ -85,6 +85,9 @@ static inline void decode_ctrl_reg(u32 reg, #define ARM_DSCR_HDBGEN (1 << 14) #define ARM_DSCR_MDBGEN (1 << 15) +/* OSLSR os lock model bits */ +#define ARM_OSLSR_OSLM0 (1 << 0) + /* opcode2 numbers for the co-processor instructions. */ #define ARM_OP2_BVR 4 #define ARM_OP2_BCR 5 |