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| author | Marc Zyngier <marc.zyngier@arm.com> | 2011-09-06 12:56:17 +0400 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2011-11-15 22:13:05 +0400 |
| commit | 562e0027d21bf64838178e2f5157df3d5833972e (patch) | |
| tree | d8585abbc8a255539c33663f850b7832bf0b4dbd /arch/arm/common/gic.c | |
| parent | baeeb8229cace91c10c856d91e5ca861d3c44968 (diff) | |
| download | linux-562e0027d21bf64838178e2f5157df3d5833972e.tar.xz | |
ARM: GIC: Add global gic_handle_irq() function
Provide the GIC code with a low level handler that can be used
by platforms using CONFIG_MULTI_IRQ_HANDLER.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/common/gic.c')
| -rw-r--r-- | arch/arm/common/gic.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 43cb6f1a7cf2..3c78b7c60691 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -40,6 +40,7 @@ #include <linux/slab.h> #include <asm/irq.h> +#include <asm/exception.h> #include <asm/mach/irq.h> #include <asm/hardware/gic.h> @@ -272,6 +273,32 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) #define gic_set_wake NULL #endif +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +{ + u32 irqstat, irqnr; + struct gic_chip_data *gic = &gic_data[0]; + void __iomem *cpu_base = gic_data_cpu_base(gic); + + do { + irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); + irqnr = irqstat & ~0x1c00; + + if (likely(irqnr > 15 && irqnr < 1021)) { + irqnr = irq_domain_to_irq(&gic->domain, irqnr); + handle_IRQ(irqnr, regs); + continue; + } + if (irqnr < 16) { + writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); +#ifdef CONFIG_SMP + handle_IPI(irqnr, regs); +#endif + continue; + } + break; + } while (1); +} + static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { struct gic_chip_data *chip_data = irq_get_handler_data(irq); |