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author | Rafael J. Wysocki <rjw@sisk.pl> | 2011-12-22 00:59:45 +0400 |
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committer | Rafael J. Wysocki <rjw@sisk.pl> | 2011-12-22 00:59:45 +0400 |
commit | b00f4dc5ff022cb9cbaffd376d9454d7fa1e496f (patch) | |
tree | 40f1b232e2f1e8ac365317a14fdcbcb331722b46 /arch/arm/common/gic.c | |
parent | 1eac8111e0763853266a171ce11214da3a347a0a (diff) | |
parent | b9e26dfdad5a4f9cbdaacafac6998614cc9c41bc (diff) | |
download | linux-b00f4dc5ff022cb9cbaffd376d9454d7fa1e496f.tar.xz |
Merge branch 'master' into pm-sleep
* master: (848 commits)
SELinux: Fix RCU deref check warning in sel_netport_insert()
binary_sysctl(): fix memory leak
mm/vmalloc.c: remove static declaration of va from __get_vm_area_node
ipmi_watchdog: restore settings when BMC reset
oom: fix integer overflow of points in oom_badness
memcg: keep root group unchanged if creation fails
nilfs2: potential integer overflow in nilfs_ioctl_clean_segments()
nilfs2: unbreak compat ioctl
cpusets: stall when updating mems_allowed for mempolicy or disjoint nodemask
evm: prevent racing during tfm allocation
evm: key must be set once during initialization
mmc: vub300: fix type of firmware_rom_wait_states module parameter
Revert "mmc: enable runtime PM by default"
mmc: sdhci: remove "state" argument from sdhci_suspend_host
x86, dumpstack: Fix code bytes breakage due to missing KERN_CONT
IB/qib: Correct sense on freectxts increment and decrement
RDMA/cma: Verify private data length
cgroups: fix a css_set not found bug in cgroup_attach_proc
oprofile: Fix uninitialized memory access when writing to writing to oprofilefs
Revert "xen/pv-on-hvm kexec: add xs_reset_watches to shutdown watches from old kernel"
...
Conflicts:
kernel/cgroup_freezer.c
Diffstat (limited to 'arch/arm/common/gic.c')
-rw-r--r-- | arch/arm/common/gic.c | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 0e6ae470c94f..410a546060a2 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -526,7 +526,8 @@ static void __init gic_pm_init(struct gic_chip_data *gic) sizeof(u32)); BUG_ON(!gic->saved_ppi_conf); - cpu_pm_register_notifier(&gic_notifier_block); + if (gic == &gic_data[0]) + cpu_pm_register_notifier(&gic_notifier_block); } #else static void __init gic_pm_init(struct gic_chip_data *gic) @@ -581,13 +582,16 @@ void __init gic_init(unsigned int gic_nr, int irq_start, * For primary GICs, skip over SGIs. * For secondary GICs, skip over PPIs, too. */ + domain->hwirq_base = 32; if (gic_nr == 0) { gic_cpu_base_addr = cpu_base; - domain->hwirq_base = 16; - if (irq_start > 0) - irq_start = (irq_start & ~31) + 16; - } else - domain->hwirq_base = 32; + + if ((irq_start & 31) > 0) { + domain->hwirq_base = 16; + if (irq_start != -1) + irq_start = (irq_start & ~31) + 16; + } + } /* * Find out how many interrupts are supported. |