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authorMiquel Raynal <miquel.raynal@bootlin.com>2022-04-27 12:56:52 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-05-06 12:09:33 +0300
commit257d24b3589ba745e5709f180667c6b27e5442aa (patch)
tree8dc17293ca0bba1832a8f59faa3706fee2286d24 /arch/arm/boot
parent747bbcd3aacd95fe200cdda415dba02e872946b5 (diff)
downloadlinux-257d24b3589ba745e5709f180667c6b27e5442aa.tar.xz
ARM: dts: r9a06g032: Add the two DMA nodes
Describe the two DMA controllers available on this SoC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20220427095653.91804-9-miquel.raynal@bootlin.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/r9a06g032.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
index cd9dc815089f..74d583927b86 100644
--- a/arch/arm/boot/dts/r9a06g032.dtsi
+++ b/arch/arm/boot/dts/r9a06g032.dtsi
@@ -201,6 +201,34 @@
status = "disabled";
};
+ dma0: dma-controller@40104000 {
+ compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
+ reg = <0x40104000 0x1000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "hclk";
+ clocks = <&sysctrl R9A06G032_HCLK_DMA0>;
+ dma-channels = <8>;
+ dma-requests = <16>;
+ dma-masters = <1>;
+ #dma-cells = <3>;
+ block_size = <0xfff>;
+ data-width = <8>;
+ };
+
+ dma1: dma-controller@40105000 {
+ compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
+ reg = <0x40105000 0x1000>;
+ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "hclk";
+ clocks = <&sysctrl R9A06G032_HCLK_DMA1>;
+ dma-channels = <8>;
+ dma-requests = <16>;
+ dma-masters = <1>;
+ #dma-cells = <3>;
+ block_size = <0xfff>;
+ data-width = <8>;
+ };
+
gic: interrupt-controller@44101000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
interrupt-controller;