diff options
author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2013-04-12 18:29:10 +0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-15 19:00:29 +0400 |
commit | 74898364e717c6bd939bb88d95049fc91d2b4950 (patch) | |
tree | 1ac0885eb1c9658b45bf1cbf5a16bfb5afabade3 /arch/arm/boot | |
parent | 467f54b2157bd01a487fd933122fd193f1e13911 (diff) | |
download | linux-74898364e717c6bd939bb88d95049fc91d2b4950.tar.xz |
ARM: dts: mvebu: Convert mvebu device tree files to 64 bits
In order to be able to use more than 4GB of RAM when the LPAE is
activated, the dts must be converted in 64 bits.
Only Armada XP is LPAE capable, but as it shares a common dtsi file
with Armada 370, then the common file include the skeleton64. Thanks
to the use of the overload capability of the device tree format,
armada-370 include the 32 bit skeleton and all the armada 370 based
dts can remain the same.
This was heavily based on the work of Lior Amsalem.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/armada-370-xp.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-370.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-xp-db.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-xp-gp.dts | 14 | ||||
-rw-r--r-- | arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts | 2 |
5 files changed, 14 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi index bf8f91113625..272bbc65fab0 100644 --- a/arch/arm/boot/dts/armada-370-xp.dtsi +++ b/arch/arm/boot/dts/armada-370-xp.dtsi @@ -16,7 +16,7 @@ * 370 and Armada XP SoC. */ -/include/ "skeleton.dtsi" +/include/ "skeleton64.dtsi" / { model = "Marvell Armada 370 and XP SoC"; @@ -33,7 +33,7 @@ #size-cells = <1>; compatible = "simple-bus"; interrupt-parent = <&mpic>; - ranges = <0 0xd0000000 0x100000>; + ranges = <0 0 0xd0000000 0x100000>; internal-regs { compatible = "simple-bus"; diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi index 6ef95dd218ae..b2c1b5af9749 100644 --- a/arch/arm/boot/dts/armada-370.dtsi +++ b/arch/arm/boot/dts/armada-370.dtsi @@ -16,6 +16,7 @@ */ /include/ "armada-370-xp.dtsi" +/include/ "skeleton.dtsi" / { model = "Marvell Armada 370 family SoC"; @@ -28,6 +29,7 @@ }; soc { + ranges = <0 0xd0000000 0x100000>; internal-regs { system-controller@18200 { compatible = "marvell,armada-370-xp-system-controller"; diff --git a/arch/arm/boot/dts/armada-xp-db.dts b/arch/arm/boot/dts/armada-xp-db.dts index 6c8b032ddbbb..d6cc8bf8272e 100644 --- a/arch/arm/boot/dts/armada-xp-db.dts +++ b/arch/arm/boot/dts/armada-xp-db.dts @@ -26,7 +26,7 @@ memory { device_type = "memory"; - reg = <0x00000000 0x80000000>; /* 2 GB */ + reg = <0 0x00000000 0 0x80000000>; /* 2 GB */ }; soc { diff --git a/arch/arm/boot/dts/armada-xp-gp.dts b/arch/arm/boot/dts/armada-xp-gp.dts index d9972c9a9279..26ad06fc147e 100644 --- a/arch/arm/boot/dts/armada-xp-gp.dts +++ b/arch/arm/boot/dts/armada-xp-gp.dts @@ -26,14 +26,16 @@ memory { device_type = "memory"; - /* - * 4 GB of plug-in RAM modules by default but only 3GB - * are visible, the amount of memory available can be - * changed by the bootloader according the size of the - * module actually plugged + * 8 GB of plug-in RAM modules by default.The amount + * of memory available can be changed by the + * bootloader according the size of the module + * actually plugged. Only 7GB are usable because + * addresses from 0xC0000000 to 0xffffffff are used by + * the internal registers of the SoC. */ - reg = <0x00000000 0xC0000000>; + reg = <0x00000000 0x00000000 0x00000000 0xC0000000>, + <0x00000001 0x00000000 0x00000001 0x00000000>; }; soc { diff --git a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts index 15a66a8bb238..f14d36c46159 100644 --- a/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts +++ b/arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts @@ -23,7 +23,7 @@ memory { device_type = "memory"; - reg = <0x00000000 0xC0000000>; /* 3 GB */ + reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ }; soc { |