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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-10-30 20:55:09 +0400
committerJason Cooper <jason@lakedaemon.net>2013-10-30 23:55:34 +0400
commitf24b56cbcd9d39cb2ed45b4b451f8614f9494c17 (patch)
treec6b108bbf00b227c073b6c7b14ec63734084c55b /arch/arm/boot
parentf039dfb51b36a2d7e4ac25e65ffbd03e3ac77a0c (diff)
downloadlinux-f24b56cbcd9d39cb2ed45b4b451f8614f9494c17.tar.xz
ARM: kirkwood: add support for OpenBlocks A7 platform
The OpenBlocks A7 board is designed and sold by PlatHome, and based on a Kirkwood 6283 Marvell SoC. It is quite similar to the OpenBlocks A6 already supported in the kernel, with the following main differences: - The A6 uses a RTC on I2C, while the A7 uses the internal SoC RTC. - The A6 has one Ethernet port, while the A7 has two Ethernet ports - The A6 has only one USB port, while the A7 integrates a USB hub, which provides two front-side USB port, and an internal USB port as well. - The A6 has 512 MB of RAM, while the A7 has 1 GB of RAM. - Slightly different GPIOs for some functions. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/Makefile5
-rw-r--r--arch/arm/boot/dts/kirkwood-openblocks_a7.dts223
2 files changed, 226 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5b832744a0bb..f2b1c33efbfc 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -95,12 +95,13 @@ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
kirkwood-ns2mini.dtb \
kirkwood-nsa310.dtb \
kirkwood-nsa310a.dtb \
+ kirkwood-openblocks_a6.dtb \
+ kirkwood-openblocks_a7.dtb \
kirkwood-sheevaplug.dtb \
kirkwood-sheevaplug-esata.dtb \
kirkwood-topkick.dtb \
kirkwood-ts219-6281.dtb \
- kirkwood-ts219-6282.dtb \
- kirkwood-openblocks_a6.dtb
+ kirkwood-ts219-6282.dtb
dtb-$(CONFIG_ARCH_MARCO) += marco-evb.dtb
dtb-$(CONFIG_ARCH_MSM) += msm8660-surf.dtb \
msm8960-cdp.dtb
diff --git a/arch/arm/boot/dts/kirkwood-openblocks_a7.dts b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
new file mode 100644
index 000000000000..851fb2a60f20
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-openblocks_a7.dts
@@ -0,0 +1,223 @@
+/*
+ * Device Tree file for OpenBlocks A7 board
+ *
+ * Copyright (C) 2013 Free Electrons
+ *
+ * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6282.dtsi"
+
+/ {
+ model = "Plat'Home OpenBlocksA7";
+ compatible = "plathome,openblocks-a7", "marvell,kirkwood-88f6283", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x40000000>; /* 1 GB */
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ };
+
+ ocp@f1000000 {
+ serial@12000 {
+ status = "ok";
+ pinctrl-0 = <&pmx_uart0>;
+ pinctrl-names = "default";
+ };
+
+ serial@12100 {
+ status = "ok";
+ pinctrl-0 = <&pmx_uart1>;
+ pinctrl-names = "default";
+ };
+
+ sata@80000 {
+ nr-ports = <1>;
+ status = "okay";
+ };
+
+ i2c@11100 {
+ status = "okay";
+ pinctrl-0 = <&pmx_twsi1>;
+ pinctrl-names = "default";
+
+ s24c02: s24c02@50 {
+ compatible = "24c02";
+ reg = <0x50>;
+ };
+ };
+
+ pinctrl: pinctrl@10000 {
+ pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;
+ pinctrl-names = "default";
+
+ pmx_uart0: pmx-uart0 {
+ marvell,pins = "mpp10", "mpp11", "mpp15",
+ "mpp16";
+ marvell,function = "uart0";
+ };
+
+ pmx_uart1: pmx-uart1 {
+ marvell,pins = "mpp13", "mpp14", "mpp8",
+ "mpp9";
+ marvell,function = "uart1";
+ };
+
+ pmx_sysrst: pmx-sysrst {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+
+ pmx_dip_switches: pmx-dip-switches {
+ marvell,pins = "mpp44", "mpp45", "mpp46", "mpp47";
+ marvell,function = "gpio";
+ };
+
+ /*
+ * Accessible on connector J202. The MPP
+ * listed below are pin 1-7, pin 8 is unused,
+ * pin 9 is external reset input and pin 10 is
+ * ground.
+ */
+ pmx_gpio_header: pmx-gpio-header {
+ marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",
+ "mpp35", "mpp34", "mpp40";
+ marvell,function = "gpio";
+ };
+
+ pmx_gpio_init: pmx-init {
+ marvell,pins = "mpp38";
+ marvell,function = "gpio";
+ };
+
+ pmx_usb_oc: pmx-usb-oc {
+ marvell,pins = "mpp39";
+ marvell,function = "gpio";
+ };
+
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp41", "mpp42", "mpp43";
+ marvell,function = "gpio";
+ };
+
+ pmx_ge1: pmx-ge1 {
+ marvell,pins = "mpp20", "mpp21", "mpp22", "mpp23",
+ "mpp24", "mpp25", "mpp26", "mpp27",
+ "mpp30", "mpp31", "mpp32", "mpp33";
+ marvell,function = "ge1";
+ };
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_leds>;
+ pinctrl-names = "default";
+
+ led-red {
+ label = "obsa7:red:stat";
+ gpios = <&gpio1 9 1>;
+ };
+
+ led-green {
+ label = "obsa7:green:stat";
+ gpios = <&gpio1 10 1>;
+ };
+
+ led-yellow {
+ label = "obsa7:yellow:stat";
+ gpios = <&gpio1 11 1>;
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pmx_gpio_init>;
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ button@1 {
+ label = "Init Button";
+ linux,code = <116>;
+ gpios = <&gpio1 6 0>;
+ };
+ };
+};
+
+&nand {
+ chip-delay = <25>;
+ status = "okay";
+ pinctrl-0 = <&pmx_nand>;
+ pinctrl-names = "default";
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x1c0000>;
+ };
+
+ partition@1c0000 {
+ label = "env";
+ reg = <0x1c0000 0x2c0000>;
+ };
+
+ partition@480000 {
+ label = "test";
+ reg = <0x480000 0x160000>;
+ };
+
+ partition@5e0000 {
+ label = "conf";
+ reg = <0x5e0000 0x540000>;
+ };
+
+ partition@b20000 {
+ label = "linux";
+ reg = <0xb20000 0x3d40000>;
+ };
+
+ partition@4860000 {
+ label = "user";
+ reg = <0x4860000 0xb7a0000>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
+
+ ethphy1: ethernet-phy@1 {
+ device_type = "ethernet-phy";
+ reg = <1>;
+ };
+};
+
+&eth0 {
+ status = "okay";
+ ethernet0-port@0 {
+ phy-handle = <&ethphy0>;
+ };
+};
+
+&eth1 {
+ status = "okay";
+ pinctrl-0 = <&pmx_ge1>;
+ pinctrl-names = "default";
+ ethernet1-port@0 {
+ phy-handle = <&ethphy1>;
+ };
+};