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| author | Thor Thayer <thor.thayer@linux.intel.com> | 2018-06-22 21:37:34 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-07-03 12:26:52 +0300 |
| commit | 71bc4823de1378581c682dd0c9c61710499bf11b (patch) | |
| tree | e08e8c168e35c46939e5878619e9e664f51f00d1 /arch/arm/boot | |
| parent | 1999b9179d6fd694023caf1c4499b6f194b186f3 (diff) | |
| download | linux-71bc4823de1378581c682dd0c9c61710499bf11b.tar.xz | |
ARM: dts: Fix SPI node for Arria10
commit 975ba94c2c3aca4d9f1ae26f3916d7787495ce86 upstream.
Remove the unused bus-num node and change num-chipselect
to num-cs to match SPI bindings.
Cc: stable@vger.kernel.org
Fixes: f2d6f8f817814 ("ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip")
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index bead79e4b2aa..9138f834bad4 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -593,8 +593,7 @@ #size-cells = <0>; reg = <0xffda5000 0x100>; interrupts = <0 102 4>; - num-chipselect = <4>; - bus-num = <0>; + num-cs = <4>; /*32bit_access;*/ tx-dma-channel = <&pdma 16>; rx-dma-channel = <&pdma 17>; |