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authorArnd Bergmann <arnd@arndb.de>2016-12-01 00:59:48 +0300
committerArnd Bergmann <arnd@arndb.de>2016-12-01 00:59:48 +0300
commitf39266cb18da53fe2c0148847a27cd78a82bc5c8 (patch)
tree1ec59635f57d8a0a50f457b9ba6ac350fbfc2407 /arch/arm/boot/dts
parent9782979e5a61538f1abd45cfc79c1059a2b7402b (diff)
parenta91b2e690d409476d711523be8a83062b9083fb2 (diff)
downloadlinux-f39266cb18da53fe2c0148847a27cd78a82bc5c8.tar.xz
Merge tag 'qcom-dts-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm Device Tree Changes for v4.10 - Part 2" from Andy Gross: * Add SDHC xo clk * tag 'qcom-dts-for-4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: ARM: dts: Add xo to sdhc clock node on qcom platforms
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi16
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi16
2 files changed, 20 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 39eb7a4ed16a..80d48867107f 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -182,13 +182,13 @@
};
clocks {
- xo_board {
+ xo_board: xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
- sleep_clk {
+ sleep_clk: sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
@@ -416,8 +416,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 123 0>, <0 138 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};
@@ -427,8 +429,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d2109475bdfd..49d579f28865 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -220,13 +220,13 @@
};
clocks {
- xo_board {
+ xo_board: xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
- sleep_clk {
+ sleep_clk: sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
@@ -558,8 +558,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 123 0>, <0 138 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};
@@ -569,8 +571,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};