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| author | Arnd Bergmann <arnd@arndb.de> | 2020-07-31 11:11:58 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-07-31 11:11:58 +0300 |
| commit | a04e84c57e9c5a98ba541f37961174ffe3abeb57 (patch) | |
| tree | 659cf90e6d6dc1f9b4285791d3b14b64a737d144 /arch/arm/boot/dts | |
| parent | 552c0e308b7cff51fa6e02f2b89d344e3c2509d6 (diff) | |
| parent | 3ad7b4e8f89d6bcc9887ca701cf2745a6aedb1a0 (diff) | |
| download | linux-a04e84c57e9c5a98ba541f37961174ffe3abeb57.tar.xz | |
Merge tag 'socfpga_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/soc
SoCFPGA update for v5.9, part 2
- Add missing put_device() call in socfpga base power management support
* tag 'socfpga_update_for_v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
ARM: socfpga: PM: add missing put_device() call in socfpga_setup_ocram_self_refresh()
ARM: dts: socfpga: add the temperature sensor to the Arria10 devkit
arm: dts: socfpga: add reset-names to spi node
arm64: dts: agilex: add nand clocks
arm64: dts: agilex: populate clock dts entries for Intel SoCFPGA Agilex
Link: https://lore.kernel.org/r/20200729165037.3099-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10_socdk.dtsi | 5 |
3 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index c2b54af417a2..a5fde3691d42 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -829,6 +829,7 @@ num-cs = <4>; clocks = <&spi_m_clk>; resets = <&rst SPIM0_RESET>; + reset-names = "spi"; status = "disabled"; }; @@ -841,6 +842,7 @@ num-cs = <4>; clocks = <&spi_m_clk>; resets = <&rst SPIM1_RESET>; + reset-names = "spi"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 3b8571b8b412..fe5826805519 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -613,6 +613,7 @@ /*32bit_access;*/ clocks = <&spi_m_clk>; resets = <&rst SPIM0_RESET>; + reset-names = "spi"; status = "disabled"; }; @@ -628,6 +629,7 @@ rx-dma-channel = <&pdma 17>; clocks = <&spi_m_clk>; resets = <&rst SPIM1_RESET>; + reset-names = "spi"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi index 0efbeccc5cd2..7edebe20e859 100644 --- a/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10_socdk.dtsi @@ -162,6 +162,11 @@ compatible = "ltc2977"; reg = <0x5c>; }; + + temp@4c { + compatible = "maxim,max1619"; + reg = <0x4c>; + }; }; &uart1 { |