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| author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-05-23 07:00:10 +0300 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-06-02 22:18:15 +0300 |
| commit | ebbce1bbc4f25c0ca68f66df54ea5e8eefa90da5 (patch) | |
| tree | 4e57f6fe9a4c8e30ea41b7fc98d606fe17faf28e /arch/arm/boot/dts | |
| parent | 479f8df04c4b7b1dd53b8c2e5b157b678c8a319c (diff) | |
| download | linux-ebbce1bbc4f25c0ca68f66df54ea5e8eefa90da5.tar.xz | |
ARM: socfpga: dts: add enable-method property for cpu nodes
Add the enable-method property for the cpu node on socfpga.dtsi and
socfpga_arria10.dtsi. This is for CPU_METHOD_OF_DECLARE to use to enable
the secondary core.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 1 | ||||
| -rw-r--r-- | arch/arm/boot/dts/socfpga_arria10.dtsi | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index d9176e606173..3a02b417ba87 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -36,6 +36,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "altr,socfpga-smp"; cpu@0 { compatible = "arm,cortex-a9"; diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index 4cf0733b930b..774e041b2572 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -36,6 +36,7 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "altr,socfpga-a10-smp"; cpu@0 { compatible = "arm,cortex-a9"; |