diff options
| author | Rob Herring <robh@kernel.org> | 2018-09-13 21:12:34 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-11-25 17:54:06 +0300 |
| commit | a6298e915763fa678bb10a2e90819974d852e6e3 (patch) | |
| tree | 07a809ea6505d45df3675daf73ca09f5018fb294 /arch/arm/boot/dts | |
| parent | 448d70e74bfa99bf242349321a8150ea3e9ffe08 (diff) | |
| download | linux-a6298e915763fa678bb10a2e90819974d852e6e3.tar.xz | |
ARM: dts: ste: Fix SPI controller node names
[ Upstream commit 2f967f9e9fa076affb711da1a8389b5d33814fc6 ]
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/ste-dbx5x0.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/ste-hrefprev60.dtsi | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/ste-snowball.dts | 2 | ||||
| -rw-r--r-- | arch/arm/boot/dts/ste-u300.dts | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 86bd320057a3..b2b23ceb6d55 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -894,7 +894,7 @@ power-domains = <&pm_domains DOMAIN_VAPE>; }; - ssp@80002000 { + spi@80002000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x80002000 0x1000>; interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; @@ -908,7 +908,7 @@ power-domains = <&pm_domains DOMAIN_VAPE>; }; - ssp@80003000 { + spi@80003000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x80003000 0x1000>; interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/ste-hrefprev60.dtsi b/arch/arm/boot/dts/ste-hrefprev60.dtsi index b0278f4c486c..55a6a1ac0337 100644 --- a/arch/arm/boot/dts/ste-hrefprev60.dtsi +++ b/arch/arm/boot/dts/ste-hrefprev60.dtsi @@ -57,7 +57,7 @@ }; }; - ssp@80002000 { + spi@80002000 { /* * On the first generation boards, this SSP/SPI port was connected * to the AB8500. diff --git a/arch/arm/boot/dts/ste-snowball.dts b/arch/arm/boot/dts/ste-snowball.dts index e80e42163883..bb1b64d6ab5e 100644 --- a/arch/arm/boot/dts/ste-snowball.dts +++ b/arch/arm/boot/dts/ste-snowball.dts @@ -311,7 +311,7 @@ pinctrl-1 = <&i2c3_sleep_mode>; }; - ssp@80002000 { + spi@80002000 { pinctrl-names = "default"; pinctrl-0 = <&ssp0_snowball_mode>; }; diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index 82a661677e97..fb6ca7f86417 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -451,7 +451,7 @@ dma-names = "rx"; }; - spi: ssp@c0006000 { + spi: spi@c0006000 { compatible = "arm,pl022", "arm,primecell"; reg = <0xc0006000 0x1000>; interrupt-parent = <&vica>; |