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authorLee Jones <lee.jones@linaro.org>2012-03-08 13:02:02 +0400
committerArnd Bergmann <arnd@arndb.de>2012-03-16 23:48:46 +0400
commitf1949ea0d1f6034d38ce20089980b6b26d527c25 (patch)
tree7c8e50314558d154008d720a4c03bc4ae5cc569c /arch/arm/boot/dts
parent4905af0e13a665da5f72d2629e93161ba781d03b (diff)
downloadlinux-f1949ea0d1f6034d38ce20089980b6b26d527c25.tar.xz
ARM: ux500: Enable PL310 Level 2 Cache Controller in Device Tree
This provides PL310 Level 2 Cache Controller Device Tree support for all u8500 based devices. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/db8500.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/db8500.dtsi b/arch/arm/boot/dts/db8500.dtsi
index 614a471df4a7..ce3b56fb9132 100644
--- a/arch/arm/boot/dts/db8500.dtsi
+++ b/arch/arm/boot/dts/db8500.dtsi
@@ -29,6 +29,14 @@
<0xa0410100 0x100>;
};
+ L2: l2-cache {
+ compatible = "arm,pl310-cache";
+ reg = <0xa0412000 0x1000>;
+ interrupts = <0 13 4>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <0 7 0x4>;