diff options
| author | Rong Wang <Rong.Wang@csr.com> | 2013-09-29 18:27:59 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-10-08 12:19:26 +0400 |
| commit | 6a08a92ec45782e5543addf5f8785e2560a078f6 (patch) | |
| tree | e5844fb3b5f3913e0a1f1c17790eebcf987a5540 /arch/arm/boot/dts | |
| parent | af614b2301f0e30423240a754ec2812a4c793201 (diff) | |
| download | linux-6a08a92ec45782e5543addf5f8785e2560a078f6.tar.xz | |
pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1).
here we add this pinmux capability.
USB1/UART1 mode selection has dedicated control register in RSC module, here we attach
the register offset of private data of related pin groups.
Signed-off-by: Rong Wang <Rong.Wang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/atlas6.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/prima2.dtsi | 12 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi index 8678e0c11119..378d4116dbf2 100644 --- a/arch/arm/boot/dts/atlas6.dtsi +++ b/arch/arm/boot/dts/atlas6.dtsi @@ -515,6 +515,18 @@ sirf,function = "usb1_utmi_drvbus"; }; }; + usb1_dp_dn_pins_a: usb1_dp_dn@0 { + usb1_dp_dn { + sirf,pins = "usb1_dp_dngrp"; + sirf,function = "usb1_dp_dn"; + }; + }; + uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 { + uart1_route_io_usb1 { + sirf,pins = "uart1_route_io_usb1grp"; + sirf,function = "uart1_route_io_usb1"; + }; + }; warm_rst_pins_a: warm_rst@0 { warm_rst { sirf,pins = "warm_rstgrp"; diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi index 569763a0e788..fb2ffaeaefbc 100644 --- a/arch/arm/boot/dts/prima2.dtsi +++ b/arch/arm/boot/dts/prima2.dtsi @@ -533,6 +533,18 @@ sirf,function = "usb1_utmi_drvbus"; }; }; + usb1_dp_dn_pins_a: usb1_dp_dn@0 { + usb1_dp_dn { + sirf,pins = "usb1_dp_dngrp"; + sirf,function = "usb1_dp_dn"; + }; + }; + uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 { + uart1_route_io_usb1 { + sirf,pins = "uart1_route_io_usb1grp"; + sirf,function = "uart1_route_io_usb1"; + }; + }; warm_rst_pins_a: warm_rst@0 { warm_rst { sirf,pins = "warm_rstgrp"; |