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| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-19 20:14:57 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-11-19 20:17:38 +0300 |
| commit | 54499b2a926964b6b671fd03dcdc83c444b8f467 (patch) | |
| tree | ba57cd39218554850e4b920747b9e71f1f9842ee /arch/arm/boot/dts/vf610-cosmic.dts | |
| parent | 2eb5252e2fffc52745a672152c7df597f4041045 (diff) | |
| parent | 0485c9dc24ec0939b42ca5104c0373297506b555 (diff) | |
| download | linux-54499b2a926964b6b671fd03dcdc83c444b8f467.tar.xz | |
Merge tag 'drm-intel-fixes-2014-11-19' into drm-intel-next-queued
So with all the code movement and extraction in intel_pm.c in -next
git is hopelessly confused with
commit 2208d655a91f9879bd9a39ff9df05dd668b3512c
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Fri Nov 14 09:25:29 2014 +0100
drm/i915: drop WaSetupGtModeTdRowDispatch:snb
from -fixes. Worse even small changes in -next move around the
conflict context so rerere is equally useless. Let's just backmerge
and be done with it.
Conflicts:
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/intel_pm.c
Except for git getting lost no tricky conflicts really.
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Diffstat (limited to 'arch/arm/boot/dts/vf610-cosmic.dts')
| -rw-r--r-- | arch/arm/boot/dts/vf610-cosmic.dts | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts index 3fd1b74e1216..de1b453c2932 100644 --- a/arch/arm/boot/dts/vf610-cosmic.dts +++ b/arch/arm/boot/dts/vf610-cosmic.dts @@ -33,6 +33,13 @@ }; +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + bus-width = <4>; + status = "okay"; +}; + &fec1 { phy-mode = "rmii"; pinctrl-names = "default"; @@ -42,6 +49,18 @@ &iomuxc { vf610-cosmic { + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + VF610_PAD_PTA24__ESDHC1_CLK 0x31ef + VF610_PAD_PTA25__ESDHC1_CMD 0x31ef + VF610_PAD_PTA26__ESDHC1_DAT0 0x31ef + VF610_PAD_PTA27__ESDHC1_DAT1 0x31ef + VF610_PAD_PTA28__ESDHC1_DATA2 0x31ef + VF610_PAD_PTA29__ESDHC1_DAT3 0x31ef + VF610_PAD_PTB28__GPIO_98 0x219d + >; + }; + pinctrl_fec1: fec1grp { fsl,pins = < VF610_PAD_PTC9__ENET_RMII1_MDC 0x30d2 |