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| author | Thierry Reding <treding@nvidia.com> | 2015-04-29 14:53:21 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2015-05-04 14:25:19 +0300 |
| commit | 5431b0fdadfec7aa61c916d6978544727a00b5fe (patch) | |
| tree | 232525a3aed1842d685074d6531f2814caa5ca4a /arch/arm/boot/dts/tegra124.dtsi | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
| download | linux-5431b0fdadfec7aa61c916d6978544727a00b5fe.tar.xz | |
ARM: tegra: Use lower-case hexadecimal digits
For consistency with other device tree content, use lower-case
hexadecimal digits in register region specifications.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index cf01c818b8ea..0d9f9ae73149 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -300,7 +300,7 @@ apbmisc@0,70000800 { compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc"; reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */ - <0x0 0x7000E864 0x0 0x04>; /* Strapping options */ + <0x0 0x7000e864 0x0 0x04>; /* Strapping options */ }; pinmux: pinmux@0,70000868 { |