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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-09-01 16:04:55 +0300
committerThierry Reding <treding@nvidia.com>2018-09-26 17:50:37 +0300
commit8be6e49a653ca79dcae1125238f78db590d86622 (patch)
tree253839cea04b6282bebca6434049d8ca56df439a /arch/arm/boot/dts/tegra124-apalis.dtsi
parentfca051b02a57c6cf9f58e83140aaf00e19c74e92 (diff)
downloadlinux-8be6e49a653ca79dcae1125238f78db590d86622.tar.xz
ARM: tegra: apalis-tk1: enable emmc ddr52 mode
Add mmc-ddr-1_8v property enabling eMMC DDR52 mode. root@apalis-tk1-mainline:~# cat /sys/kernel/debug/mmc2/ios clock: 52000000 Hz actual clock: 52000000 Hz vdd: 21 (3.3 ~ 3.4 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 3 (8 bits) timing spec: 8 (mmc DDR52) signal voltage: 1 (1.80 V) driver type: 0 (driver type B) root@apalis-tk1-mainline:~# hdparm -t /dev/mmcblk2 /dev/mmcblk2: Timing buffered disk reads: 256 MB in 3.02 seconds = 84.83 MB/sec Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-apalis.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra124-apalis.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi
index ba6fc2e51b2d..f76580f6cc80 100644
--- a/arch/arm/boot/dts/tegra124-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
@@ -1948,6 +1948,7 @@
non-removable;
vmmc-supply = <&reg_module_3v3>; /* VCC */
vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
+ mmc-ddr-1_8v;
};
/* CPU DFLL clock */