diff options
| author | Thierry Reding <treding@nvidia.com> | 2021-12-17 16:51:51 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-12-17 16:55:32 +0300 |
| commit | b59e11495b1a0e94d6357ce5df54e24ecbeb8319 (patch) | |
| tree | 3c45d1e154ef3b21066e2655154538749f9d3dfe /arch/arm/boot/dts/tegra114.dtsi | |
| parent | 9ca9a608a787f0f67adea8757fad86d6632c6232 (diff) | |
| download | linux-b59e11495b1a0e94d6357ce5df54e24ecbeb8319.tar.xz | |
ARM: tegra: Add memory client hotflush resets on Tegra114
Add the host1x, gr2d and gr3d memory client hotflush resets on Tegra114.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra114.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra114.dtsi | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index f20be4ca16a1..09996acad639 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -38,8 +38,8 @@ interrupt-names = "syncpt", "host1x"; clocks = <&tegra_car TEGRA114_CLK_HOST1X>; clock-names = "host1x"; - resets = <&tegra_car 28>; - reset-names = "host1x"; + resets = <&tegra_car 28>, <&mc TEGRA114_MC_RESET_HC>; + reset-names = "host1x", "mc"; iommus = <&mc TEGRA_SWGROUP_HC>; #address-cells = <1>; @@ -52,8 +52,8 @@ reg = <0x54140000 0x00040000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_GR2D>; - resets = <&tegra_car 21>; - reset-names = "2d"; + resets = <&tegra_car 21>, <&mc TEGRA114_MC_RESET_2D>; + reset-names = "2d", "mc"; iommus = <&mc TEGRA_SWGROUP_G2>; }; @@ -62,8 +62,8 @@ compatible = "nvidia,tegra114-gr3d"; reg = <0x54180000 0x00040000>; clocks = <&tegra_car TEGRA114_CLK_GR3D>; - resets = <&tegra_car 24>; - reset-names = "3d"; + resets = <&tegra_car 24>, <&mc TEGRA114_MC_RESET_3D>; + reset-names = "3d", "mc"; iommus = <&mc TEGRA_SWGROUP_NV>; }; |