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authorSamuel Holland <samuel@sholland.org>2021-01-18 08:50:38 +0300
committerChen-Yu Tsai <wens@csie.org>2021-03-06 10:39:18 +0300
commit994e5818392c814c512d94edef036b4c0c08337d (patch)
tree9a2f563e3f72bc103533a7e1a205b972f531c85f /arch/arm/boot/dts/sunxi-h3-h5.dtsi
parent3fb01dedfe446789f4686e57ef1b58acbdb3ec99 (diff)
downloadlinux-994e5818392c814c512d94edef036b4c0c08337d.tar.xz
ARM: dts: sunxi: Move wakeup-capable IRQs to r_intc
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. In addition to the external NMI input, which is already routed through r_intc, these include PIO and R_PIO (gpio-keys), the LRADC, and the RTC. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 4bf25c5b873e..c7428df9469e 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -395,6 +395,7 @@
pio: pinctrl@1c20800 {
/* compatible is in per SoC .dtsi file */
reg = <0x01c20800 0x400>;
+ interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
@@ -852,6 +853,7 @@
rtc: rtc@1f00000 {
/* compatible is in per SoC .dtsi file */
reg = <0x01f00000 0x400>;
+ interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
@@ -909,6 +911,7 @@
r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun8i-h3-r-pinctrl";
reg = <0x01f02c00 0x400>;
+ interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";