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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-21 17:38:35 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-23 13:02:07 +0300 |
| commit | 9e1975f0bca9ef9fc5d76f056cab7240e25bca76 (patch) | |
| tree | 4eb9785506dee33341a0f8908850827efec906a7 /arch/arm/boot/dts/sunxi-h3-h5.dtsi | |
| parent | 89d1e51462d4749874ba3505c7de46734fda82f1 (diff) | |
| download | linux-9e1975f0bca9ef9fc5d76f056cab7240e25bca76.tar.xz | |
ARM: dts: sunxi: Add missing watchdog clocks
The watchdog has a clock on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 224e105a994a..eba190b3f9de 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -574,6 +574,7 @@ compatible = "allwinner,sun6i-a31-wdt"; reg = <0x01c20ca0 0x20>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&osc24M>; }; spdif: spdif@1c21000 { |