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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-29 00:41:29 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-10-30 18:36:49 +0300
commit888366fa17841ac1feb00c693e6956a5abfecb93 (patch)
tree39c31b903ac2688d873c578adf6d99d1ebbabee0 /arch/arm/boot/dts/sun9i-a80.dtsi
parent43d024d36a558a37b0f47d753a45f568e525b7eb (diff)
downloadlinux-888366fa17841ac1feb00c693e6956a5abfecb93.tar.xz
ARM: sun9i: optimus: Set UART0 muxing
Enable the UART0 muxing, as set up by the bootloader. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/sun9i-a80.dtsi')
-rw-r--r--arch/arm/boot/dts/sun9i-a80.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index fe9832a2d8b8..da680cf195e2 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -351,6 +351,13 @@
#interrupt-cells = <2>;
#size-cells = <0>;
#gpio-cells = <3>;
+
+ uart0_pins_a: uart0@0 {
+ allwinner,pins = "PH12", "PH13";
+ allwinner,function = "uart0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
uart0: serial@07000000 {