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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-07-22 11:12:29 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-23 10:14:50 +0300 |
| commit | 18742b249e37ef13967a34eaf26270a0a00477f6 (patch) | |
| tree | 2360e5720b176a503ac9641da9057687bd5ba27d /arch/arm/boot/dts/sun8i-v3s.dtsi | |
| parent | 19aeb5a80cfac916225aca6143ffb1785c780c51 (diff) | |
| download | linux-18742b249e37ef13967a34eaf26270a0a00477f6.tar.xz | |
ARM: dts: v3s: Change the timers compatible
Unlike the A10 that has 6 timers available, the v3s has only three, with only
three interrupts. Let's change the compatible to reflect that, and add the
missing interrupts.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-v3s.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-v3s.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 20a3f11bddcc..ddbcc28dc541 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -327,10 +327,11 @@ }; timer@1c20c00 { - compatible = "allwinner,sun4i-a10-timer"; + compatible = "allwinner,sun8i-v3s-timer"; reg = <0x01c20c00 0xa0>; interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; clocks = <&osc24M>; }; |