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authorPhilipp Rossak <embed3d@gmail.com>2017-09-01 19:30:00 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-09-17 13:04:28 +0300
commit3b97059133a931797248670570205333492daa0e (patch)
tree45d90682ee68918a5649776cbfe26df4aaadcd59 /arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
parent0e23372080def7bb6526f694c478e285a3bb8908 (diff)
downloadlinux-3b97059133a931797248670570205333492daa0e.tar.xz
ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus
The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line. Signed-off-by: Philipp Rossak <embed3d@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts')
-rw-r--r--arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
index 04800d3cf503..73766d38ee6c 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
@@ -48,6 +48,13 @@
aliases {
serial1 = &uart3;
+ ethernet1 = &sdio_wifi;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
};
@@ -65,6 +72,25 @@
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins_a>;
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ sdio_wifi: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+ interrupt-names = "host-wake";
+ };
+};
+
&ohci1 {
status = "okay";
};