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author | Olof Johansson <olof@lixom.net> | 2012-11-21 10:14:59 +0400 |
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committer | Olof Johansson <olof@lixom.net> | 2012-11-21 10:14:59 +0400 |
commit | 5ffd785402c295328d3866d9f8630152f51d332a (patch) | |
tree | 1ecf19ebd7e92b5a99ce094934c0a7901c96402b /arch/arm/boot/dts/sun5i.dtsi | |
parent | 8ac49e0485bb79223a111b366a3b1f5ec9148729 (diff) | |
parent | 1b106699647b56313bac707e12e7ad67180cb147 (diff) | |
download | linux-5ffd785402c295328d3866d9f8630152f51d332a.tar.xz |
Merge tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux into next/soc
From Maxime Ripard:
Allwinner SoC support for 3.8
* tag 'tags/sunxi-support-for-3.8' of git://github.com/mripard/linux:
ARM: sunxi: Add entry to MAINTAINERS
ARM: sunxi: Add device tree for the A13 and the Olinuxino board
ARM: sunxi: Add earlyprintk support
ARM: sunxi: Add basic support for Allwinner A1x SoCs
irqchip: sunxi: Add irq controller driver
clocksource: sunxi: Add Allwinner A1X Timer Driver
clk: sunxi: Add dummy fixed rate clock for Allwinner A1X SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/sun5i.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sun5i.dtsi | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi new file mode 100644 index 000000000000..4bedf3e826e8 --- /dev/null +++ b/arch/arm/boot/dts/sun5i.dtsi @@ -0,0 +1,74 @@ +/* + * Copyright 2012 Maxime Ripard + * + * Maxime Ripard <maxime.ripard@free-electrons.com> + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/include/ "skeleton.dtsi" + +/ { + interrupt-parent = <&intc>; + + cpus { + cpu@0 { + compatible = "arm,cortex-a8"; + }; + }; + + chosen { + bootargs = "earlyprintk console=ttyS0,115200"; + }; + + memory { + reg = <0x40000000 0x20000000>; + }; + + clocks { + #address-cells = <1>; + #size-cells = <0>; + + osc: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x01c20000 0x300000>; + ranges; + + timer@01c20c00 { + compatible = "allwinner,sunxi-timer"; + reg = <0x01c20c00 0x400>; + interrupts = <22>; + clocks = <&osc>; + }; + + intc: interrupt-controller@01c20400 { + compatible = "allwinner,sunxi-ic"; + reg = <0x01c20400 0x400>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart1: uart@01c28400 { + compatible = "ns8250"; + reg = <0x01c28400 0x400>; + interrupts = <2>; + reg-shift = <2>; + clock-frequency = <24000000>; + status = "disabled"; + }; + }; +}; |