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authorArnd Bergmann <arnd@arndb.de>2013-06-20 17:23:41 +0400
committerArnd Bergmann <arnd@arndb.de>2013-06-20 17:23:41 +0400
commitdc61cd9ecb918f593972962b97cf6079ab9d1daf (patch)
treecbe1e1d7fc2e231da2db3969f7004d995514f8ea /arch/arm/boot/dts/sun5i-a13.dtsi
parented2ca6ee4bfd060c079fd05d0eb8862da02dd248 (diff)
parentd0f2677be5b49a1c1de59fe94faa96b7808be95f (diff)
downloadlinux-dc61cd9ecb918f593972962b97cf6079ab9d1daf.tar.xz
Merge tag 'sunxi-dt-for-3.11-2' of git://github.com/mripard/linux into next/dt
From Maxime Ripard: Allwinner SoCs DT additions for 3.11, part 2 Mostly adds support for the i2c controllers and the Allwinner A10S SoC. * tag 'sunxi-dt-for-3.11-2' of git://github.com/mripard/linux: ARM: sunxi: Add Olimex A10s-Olinuxino-micro device tree ARM: sunxi: dt: Add Allwinner A10s DTSI ARM: sun4i: cubieboard: Enable the i2c controllers ARM: sun5i: olinuxino: Enable the i2c controllers ARM: sun5i: dt: Add i2c muxing options ARM: sun4i: dt: Add i2c muxing options ARM: sunxi: dt: Add i2c controller nodes to the DTSI Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/sun5i-a13.dtsi')
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi48
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 027cb24438f8..7363211daf84 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -188,6 +188,27 @@
allwinner,drive = <0>;
allwinner,pull = <0>;
};
+
+ i2c0_pins_a: i2c0@0 {
+ allwinner,pins = "PB0", "PB1";
+ allwinner,function = "i2c0";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
+ i2c1_pins_a: i2c1@0 {
+ allwinner,pins = "PB15", "PB16";
+ allwinner,function = "i2c1";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
+
+ i2c2_pins_a: i2c2@0 {
+ allwinner,pins = "PB17", "PB18";
+ allwinner,function = "i2c2";
+ allwinner,drive = <0>;
+ allwinner,pull = <0>;
+ };
};
timer@01c20c00 {
@@ -221,5 +242,32 @@
clocks = <&apb1_gates 19>;
status = "disabled";
};
+
+ i2c0: i2c@01c2ac00 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2ac00 0x400>;
+ interrupts = <7>;
+ clocks = <&apb1_gates 0>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@01c2b000 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b000 0x400>;
+ interrupts = <8>;
+ clocks = <&apb1_gates 1>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@01c2b400 {
+ compatible = "allwinner,sun4i-i2c";
+ reg = <0x01c2b400 0x400>;
+ interrupts = <9>;
+ clocks = <&apb1_gates 2>;
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
};
};