diff options
| author | Linus Walleij <linus.walleij@linaro.org> | 2013-10-18 12:39:58 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-10-18 16:55:43 +0400 |
| commit | 72b3e249ce5fb298e69bec698f9fdae7cc3f4ceb (patch) | |
| tree | d3b46859e54bbefa03e721925c20b73b5aa31268 /arch/arm/boot/dts/ste-dbx5x0.dtsi | |
| parent | d591640adc7beaf816c2ffc0952d25b836cb3fcf (diff) | |
| download | linux-72b3e249ce5fb298e69bec698f9fdae7cc3f4ceb.tar.xz | |
ARM: ux500: fix I2C4 clock bit
The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers
while the KCLK is controlled by bit 9 on the KCKEN, it's
one of these odd assymetric things. Correct the PCLK bit to 10.
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-dbx5x0.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/ste-dbx5x0.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 5112f4cd8bce..0fc634b1b50e 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -694,7 +694,7 @@ clock-frequency = <400000>; - clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>; + clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; clock-names = "i2cclk", "apb_pclk"; }; |