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| author | Haojian Zhuang <haojian.zhuang@linaro.org> | 2013-02-17 15:42:47 +0400 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2013-03-07 08:27:29 +0400 |
| commit | 86853c83e33738397564e9377ceeff94d4bc041c (patch) | |
| tree | 94b4df911227c48b62ace647d0989a2b4da0d019 /arch/arm/boot/dts/spear320.dtsi | |
| parent | e3929714942b242ecb55657e70d51e0eb4c77726 (diff) | |
| download | linux-86853c83e33738397564e9377ceeff94d4bc041c.tar.xz | |
gpio: add gpio offset in gpio range cells property
Add gpio offset into "gpio-range-cells" property. It's used to support
sparse pinctrl range in gpio chip.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/spear320.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/spear320.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi index caa5520b1fd4..ffea342aeec9 100644 --- a/arch/arm/boot/dts/spear320.dtsi +++ b/arch/arm/boot/dts/spear320.dtsi @@ -24,7 +24,7 @@ pinmux: pinmux@b3000000 { compatible = "st,spear320-pinmux"; reg = <0xb3000000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; clcd@90000000 { @@ -130,7 +130,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 102>; + gpio-ranges = <&pinmux 0 0 102>; status = "disabled"; st-plgpio,ngpio = <102>; |