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author | Marek Vasut <marex@denx.de> | 2016-03-20 02:57:05 +0300 |
---|---|---|
committer | Dinh Nguyen <dinguyen@kernel.org> | 2016-04-11 22:00:30 +0300 |
commit | 702744ce8b3ef369ed8f8e257cbee4db44beb415 (patch) | |
tree | ce4018643d3db0c1e567df86cd39078ff188d93b /arch/arm/boot/dts/socfpga_cyclone5.dtsi | |
parent | ebaea3a7852e19bcffcbc8d7de055f2ebacda7ca (diff) | |
download | linux-702744ce8b3ef369ed8f8e257cbee4db44beb415.tar.xz |
ARM: dts: socfpga: Drop gmac0 from CV dtsi
The socfpga_cyclone5.dtsi is included by all DTS files which describe boards
using the Cyclone V SoC. The Cyclone V SoC has two ethernet controllers and
different boards use none, one or both of them.
The /soc/ethernet@ff702000/{} node in socfpga_cyclone5.dtsi unconditionaly
enabled gmac0 interface, which is clearly wrong for those boards which use
gmac1 interface instead.
This patch removes the entire /soc/ethernet@ff702000/{} node from the
socfpga_cyclone5.dtsi file. This is correct, since all of the board which
include this file also have correct gmac0 or gmac1 node present in them.
Minor correction had to be done to EBV SoCrates, which didn't define PHY
mode explicitly, but inherited it from the socfpga_cyclone5.dtsi .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_cyclone5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/socfpga_cyclone5.dtsi | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi index 418c19eb2b40..a05e3df23103 100644 --- a/arch/arm/boot/dts/socfpga_cyclone5.dtsi +++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi @@ -38,11 +38,6 @@ cap-sd-highspeed; }; - ethernet@ff702000 { - phy-mode = "rgmii"; - status = "okay"; - }; - sysmgr@ffd08000 { cpu1-start-addr = <0xffd080c4>; }; |