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authorDinh Nguyen <dinguyen@opensource.altera.com>2015-07-24 23:13:17 +0300
committerDinh Nguyen <dinh.linux@gmail.com>2015-08-10 05:58:58 +0300
commit6855e5b7090330add9521d8947017875d5f4f88e (patch)
tree25a901066094f352899f340dd765daceb19924ad /arch/arm/boot/dts/socfpga_arria10.dtsi
parent1a94acf858000836d28b13942eebf5cbffc9ac34 (diff)
downloadlinux-6855e5b7090330add9521d8947017875d5f4f88e.tar.xz
ARM: socfpga: dts: Add resets for EMACs on Arria10
Add the reset property for the EMAC controllers on Arria10. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/boot/dts/socfpga_arria10.dtsi')
-rw-r--r--arch/arm/boot/dts/socfpga_arria10.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi
index 1d341dc3e598..98c5506c2a35 100644
--- a/arch/arm/boot/dts/socfpga_arria10.dtsi
+++ b/arch/arm/boot/dts/socfpga_arria10.dtsi
@@ -16,6 +16,7 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/altr,rst-mgr-a10.h>
/ {
#address-cells = <1>;
@@ -409,6 +410,8 @@
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
clock-names = "stmmaceth";
+ resets = <&rst EMAC0_RESET>;
+ reset-names = "stmmaceth";
status = "disabled";
};
@@ -426,6 +429,8 @@
rx-fifo-depth = <16384>;
clocks = <&l4_mp_clk>;
clock-names = "stmmaceth";
+ resets = <&rst EMAC1_RESET>;
+ reset-names = "stmmaceth";
status = "disabled";
};