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author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2020-03-26 12:53:57 +0300 |
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committer | Dinh Nguyen <dinguyen@kernel.org> | 2020-05-04 23:14:51 +0300 |
commit | 29aed3ef6d4985bf8d3ef6505c3e63efc838414e (patch) | |
tree | 7840cc7d030ed1e5e5487871e8461f0a3a0c3ea4 /arch/arm/boot/dts/socfpga.dtsi | |
parent | b64ac044ad949711470213550b53bd06684c5a03 (diff) | |
download | linux-29aed3ef6d4985bf8d3ef6505c3e63efc838414e.tar.xz |
ARM: dts: socfpga: Add fpga2hps and fpga2sdram bridges
Add the remaining two bridges on the Cyclone-V SoCFPGA SoCs.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/socfpga.dtsi')
-rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index 7f0480354ee6..c2b54af417a2 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -542,6 +542,20 @@ status = "disabled"; }; + fpga_bridge2: fpga-bridge@ff600000 { + compatible = "altr,socfpga-fpga2hps-bridge"; + reg = <0xff600000 0x100000>; + resets = <&rst FPGA2HPS_RESET>; + clocks = <&l4_main_clk>; + status = "disabled"; + }; + + fpga_bridge3: fpga-bridge@ffc25080 { + compatible = "altr,socfpga-fpga2sdram-bridge"; + reg = <0xffc25080 0x4>; + status = "disabled"; + }; + fpgamgr0: fpgamgr@ff706000 { compatible = "altr,socfpga-fpga-mgr"; reg = <0xff706000 0x1000 |