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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2020-01-11 01:27:44 +0300
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2020-04-13 14:00:08 +0300
commit7ed609b0020fd1db5acde66248f5623328834b72 (patch)
tree45b76a8af4a63f0253afee1403163db09a61a2ab /arch/arm/boot/dts/sama5d3_uart.dtsi
parent8f3d9f354286745c751374f5f1fcafee6b3f3136 (diff)
downloadlinux-7ed609b0020fd1db5acde66248f5623328834b72.tar.xz
ARM: dts: at91: sama5d3: switch to new clock bindings
Switch sama5d3 boards to the new PMC clock bindings. This prevents the wb50n to use the out of spec rate for USART1. Link: https://lore.kernel.org/r/20200110222744.1261464-1-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d3_uart.dtsi')
-rw-r--r--arch/arm/boot/dts/sama5d3_uart.dtsi20
1 files changed, 2 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/sama5d3_uart.dtsi b/arch/arm/boot/dts/sama5d3_uart.dtsi
index cb62adbd28ed..a3eaba995cf4 100644
--- a/arch/arm/boot/dts/sama5d3_uart.dtsi
+++ b/arch/arm/boot/dts/sama5d3_uart.dtsi
@@ -36,29 +36,13 @@
};
};
- pmc: pmc@fffffc00 {
- periphck {
- uart0_clk: uart0_clk {
- #clock-cells = <0>;
- reg = <16>;
- atmel,clk-output-range = <0 83000000>;
- };
-
- uart1_clk: uart1_clk {
- #clock-cells = <0>;
- reg = <17>;
- atmel,clk-output-range = <0 83000000>;
- };
- };
- };
-
uart0: serial@f0024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf0024000 0x100>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
- clocks = <&uart0_clk>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
clock-names = "usart";
status = "disabled";
};
@@ -69,7 +53,7 @@
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
- clocks = <&uart1_clk>;
+ clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
clock-names = "usart";
status = "disabled";
};