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author | Arnd Bergmann <arnd@arndb.de> | 2016-03-02 23:45:58 +0300 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2016-03-02 23:45:58 +0300 |
commit | 9c8add4c4a491ec236e6e4eb9a22e37370145063 (patch) | |
tree | ae87efe7fa2550d0ba3f2b12f960735ade2b1179 /arch/arm/boot/dts/sama5d2.dtsi | |
parent | e3c739e1299a40811bdaff68dd005be76d4b0c6a (diff) | |
parent | ed0f4b3ffcdbd2b47a0b24035bb6f22464c9fef1 (diff) | |
download | linux-9c8add4c4a491ec236e6e4eb9a22e37370145063.tar.xz |
Merge tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 4.6 #2" from Nicolas Ferre:
Second 4.6 DT series, all patches for sama5d2 and its Xplained board:
- addition of the NAND flash node
- addition of the dma properties for UART/USART nodes
- one update of the sama5d2 Xplained phy node
- addition of USB pinmux, button and leds
* tag 'at91-dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: dts: at91: sama5d2 Xplained: add leds node
ARM: dts: at91: sama5d2 Xplained: add user push button
ARM: dts: at91: sama5d2 Xplained: set pin muxing for usb gadget and usb host
ARM: dts: at91: sama5d2: add nand0 and nfc0 nodes
ARM: dts: at91: sama5d2: add dma properties to UART nodes
ARM: dts: at91: sama5d2 Xplained: Correct the macb irq pinctrl node
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sama5d2.dtsi | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 46dd4308844e..78996bdbd3df 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -257,6 +257,44 @@ cache-level = <2>; }; + nand0: nand@80000000 { + compatible = "atmel,sama5d2-nand"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + reg = < /* EBI CS3 */ + 0x80000000 0x08000000 + /* SMC PMECC regs */ + 0xf8014070 0x00000490 + /* SMC PMECC Error Location regs */ + 0xf8014500 0x00000200 + /* ROM Galois tables */ + 0x00040000 0x00018000 + >; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>; + atmel,nand-addr-offset = <21>; + atmel,nand-cmd-offset = <22>; + atmel,nand-has-dma; + atmel,has-pmecc; + atmel,pmecc-lookup-table-offset = <0x0 0x8000>; + status = "disabled"; + + nfc@c0000000 { + compatible = "atmel,sama5d4-nfc"; + #address-cells = <1>; + #size-cells = <1>; + reg = < /* NFC Command Registers */ + 0xc0000000 0x08000000 + /* NFC HSMC regs */ + 0xf8014000 0x00000070 + /* NFC SRAM banks */ + 0x00100000 0x00100000 + >; + clocks = <&hsmc_clk>; + atmel,write-by-sram; + }; + }; + sdmmc0: sdio-host@a0000000 { compatible = "atmel,sama5d2-sdhci"; reg = <0xa0000000 0x300>; @@ -874,6 +912,13 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x100>; interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(35))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(36))>; + dma-names = "tx", "rx"; clocks = <&uart0_clk>; clock-names = "usart"; status = "disabled"; @@ -883,6 +928,13 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x100>; interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(37))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(38))>; + dma-names = "tx", "rx"; clocks = <&uart1_clk>; clock-names = "usart"; status = "disabled"; @@ -892,6 +944,13 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x100>; interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(39))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(40))>; + dma-names = "tx", "rx"; clocks = <&uart2_clk>; clock-names = "usart"; status = "disabled"; @@ -1010,6 +1069,13 @@ compatible = "atmel,at91sam9260-usart"; reg = <0xfc008000 0x100>; interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(41))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(42))>; + dma-names = "tx", "rx"; clocks = <&uart3_clk>; clock-names = "usart"; status = "disabled"; @@ -1018,6 +1084,13 @@ uart4: serial@fc00c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfc00c000 0x100>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(43))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(44))>; + dma-names = "tx", "rx"; interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>; clocks = <&uart4_clk>; clock-names = "usart"; |