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| author | Ludovic Desroches <ludovic.desroches@microchip.com> | 2019-11-28 10:45:22 +0300 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-12-10 02:42:24 +0300 |
| commit | bbd73c02e7d19e7227d4780f9597f95ffb84bb68 (patch) | |
| tree | 4b1a181b6627d446bc9c25c6d3c242f656bbde77 /arch/arm/boot/dts/sama5d2.dtsi | |
| parent | e52a033610b0f220f488faaf579a61d7ab31616a (diff) | |
| download | linux-bbd73c02e7d19e7227d4780f9597f95ffb84bb68.tar.xz | |
ARM: dts: at91: sama5d2: set the sdmmc gclk frequency
Set the frequency of the generated clock used by sdmmc devices in order
to not rely on the configuration done by previous components.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Link: https://lore.kernel.org/r/20191128074522.69706-3-ludovic.desroches@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama5d2.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 1b6f44b47f45..2012b7407c60 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -300,6 +300,8 @@ interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>; clock-names = "hclock", "multclk", "baseclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 31>; + assigned-clock-rates = <480000000>; status = "disabled"; }; @@ -309,6 +311,8 @@ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>; clock-names = "hclock", "multclk", "baseclk"; + assigned-clocks = <&pmc PMC_TYPE_GCK 32>; + assigned-clock-rates = <480000000>; status = "disabled"; }; |