diff options
| author | Andreas Färber <afaerber@suse.de> | 2019-11-08 21:22:23 +0300 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2020-04-13 00:24:13 +0300 |
| commit | ede8b703750c8cd5bd50feb18a9f300697d3b196 (patch) | |
| tree | 3c805c5951f4e0705f1b861cbaccb9ee9a2fefbf /arch/arm/boot/dts/rtd1195.dtsi | |
| parent | af19d9b8844f5e4573e59a42914af83200bf86a4 (diff) | |
| download | linux-ede8b703750c8cd5bd50feb18a9f300697d3b196.tar.xz | |
ARM: dts: rtd1195: Introduce r-bus
Model Realtek's register bus in DT.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'arch/arm/boot/dts/rtd1195.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rtd1195.dtsi | 52 |
1 files changed, 30 insertions, 22 deletions
diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 0d7c2be750f6..a8f7b9caacba 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -93,28 +93,36 @@ <0x18100000 0x18100000 0x01000000>, <0x80000000 0x80000000 0x80000000>; - wdt: watchdog@18007680 { - compatible = "realtek,rtd1295-watchdog"; - reg = <0x18007680 0x100>; - clocks = <&osc27M>; - }; - - uart0: serial@18007800 { - compatible = "snps,dw-apb-uart"; - reg = <0x18007800 0x400>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <27000000>; - status = "disabled"; - }; - - uart1: serial@1801b200 { - compatible = "snps,dw-apb-uart"; - reg = <0x1801b200 0x100>; - reg-shift = <2>; - reg-io-width = <4>; - clock-frequency = <27000000>; - status = "disabled"; + rbus: bus@18000000 { + compatible = "simple-bus"; + reg = <0x18000000 0x70000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x18000000 0x70000>; + + wdt: watchdog@7680 { + compatible = "realtek,rtd1295-watchdog"; + reg = <0x7680 0x100>; + clocks = <&osc27M>; + }; + + uart0: serial@7800 { + compatible = "snps,dw-apb-uart"; + reg = <0x7800 0x400>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; + + uart1: serial@1b200 { + compatible = "snps,dw-apb-uart"; + reg = <0x1b200 0x100>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <27000000>; + status = "disabled"; + }; }; gic: interrupt-controller@ff011000 { |