diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2014-04-15 03:16:44 +0400 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-07-27 01:15:22 +0400 |
| commit | b13d2a7b43654c7f52aba9dc04f93cf7055ebc8b (patch) | |
| tree | 612405f09cfa849f3067ac412dafc9b2f5c5d952 /arch/arm/boot/dts/rk3xxx.dtsi | |
| parent | 1fe69496cf463b654d2d6e1a9a10fb8d99f10831 (diff) | |
| download | linux-b13d2a7b43654c7f52aba9dc04f93cf7055ebc8b.tar.xz | |
ARM: dts: rockchip: add cru nodes and update device clocks to use it
This adds a node for the clock and reset unit on rk3188 and rk3066 SoCs and
also updates the device nodes retrieve their clocks from there, instead of
the previous gate clock nodes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-By: Max Schwarz <max.schwarz@online.de>
Tested-By: Max Schwarz <max.schwarz@online.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 2adf1cc9e85d..b47d5fe81187 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -60,14 +60,14 @@ compatible = "arm,cortex-a9-global-timer"; reg = <0x1013c200 0x20>; interrupts = <GIC_PPI 11 0x304>; - clocks = <&dummy150m>; + clocks = <&cru CORE_PERI>; }; local-timer@1013c600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x1013c600 0x20>; interrupts = <GIC_PPI 13 0x304>; - clocks = <&dummy150m>; + clocks = <&cru CORE_PERI>; }; uart0: serial@10124000 { @@ -76,7 +76,7 @@ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <1>; - clocks = <&clk_gates1 8>; + clocks = <&cru SCLK_UART0>; status = "disabled"; }; @@ -86,7 +86,7 @@ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <1>; - clocks = <&clk_gates1 10>; + clocks = <&cru SCLK_UART1>; status = "disabled"; }; @@ -96,7 +96,7 @@ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <1>; - clocks = <&clk_gates1 12>; + clocks = <&cru SCLK_UART2>; status = "disabled"; }; @@ -106,7 +106,7 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <1>; - clocks = <&clk_gates1 14>; + clocks = <&cru SCLK_UART3>; status = "disabled"; }; @@ -117,7 +117,7 @@ #address-cells = <1>; #size-cells = <0>; - clocks = <&clk_gates5 10>, <&clk_gates2 11>; + clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>; clock-names = "biu", "ciu"; status = "disabled"; @@ -130,7 +130,7 @@ #address-cells = <1>; #size-cells = <0>; - clocks = <&clk_gates5 11>, <&clk_gates2 13>; + clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>; clock-names = "biu", "ciu"; status = "disabled"; |