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authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-12-19 19:51:05 +0400
committerSimon Horman <horms+renesas@verge.net.au>2013-12-24 18:01:13 +0400
commit6dea2c1ebc6fc43852fd6125d75a75da223ff707 (patch)
treea52af98c17aa15d63c8c1da2b4fa0692b0844762 /arch/arm/boot/dts/r8a7790.dtsi
parentec71f55216db1b3da68e284840cb3ac3d5ed4965 (diff)
downloadlinux-6dea2c1ebc6fc43852fd6125d75a75da223ff707.tar.xz
ARM: shmobile: r8a7790: Add SSI clocks in device tree
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi20
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index a1791250bf4b..c5417dafca0d 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -626,5 +626,25 @@
clock-output-names =
"rcan1", "rcan0", "qspi_mod", "i2c3", "i2c2", "i2c1", "i2c0";
};
+ mstp10_clks: mstp10_clks@e6150998 {
+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
+ reg = <0 0xe6150998 0 4>, <0 0xe61509a8 0 4>;
+ clocks = <&p_clk>, <&mstp10_clks R8A7790_CLK_SSI>,
+ <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>,
+ <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>,
+ <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>,
+ <&mstp10_clks R8A7790_CLK_SSI>, <&mstp10_clks R8A7790_CLK_SSI>,
+ <&mstp10_clks R8A7790_CLK_SSI>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <
+ R8A7790_CLK_SSI R8A7790_CLK_SSI9 R8A7790_CLK_SSI8
+ R8A7790_CLK_SSI7 R8A7790_CLK_SSI6 R8A7790_CLK_SSI5
+ R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2
+ R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
+ >;
+ clock-output-names =
+ "ssi", "ssi9", "ssi8", "ssi7", "ssi6", "ssi5",
+ "ssi4", "ssi3", "ssi2", "ssi1", "ssi0";
+ };
};
};