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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2020-05-06 22:51:29 +0300
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-05-11 11:27:27 +0300
commita31a8c9cbc0762b096e0b176ba481a60e54db5bf (patch)
tree4fa5cda7b7b57fa02af8f6b00ae40e4d69687f71 /arch/arm/boot/dts/r8a7742.dtsi
parent48ad3c4a334ad1e583f5159f43c3623ecaffc9f9 (diff)
downloadlinux-a31a8c9cbc0762b096e0b176ba481a60e54db5bf.tar.xz
ARM: dts: r8a7742: Add IRQC support
Describe the IRQC interrupt controller in the r8a7742 device tree. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Acked-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1588794695-27852-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm/boot/dts/r8a7742.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7742.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7742.dtsi b/arch/arm/boot/dts/r8a7742.dtsi
index 3d3d95678496..06a4241bafd8 100644
--- a/arch/arm/boot/dts/r8a7742.dtsi
+++ b/arch/arm/boot/dts/r8a7742.dtsi
@@ -226,6 +226,20 @@
#power-domain-cells = <1>;
};
+ irqc: interrupt-controller@e61c0000 {
+ compatible = "renesas,irqc-r8a7742", "renesas,irqc";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ reg = <0 0xe61c0000 0 0x200>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 407>;
+ power-domains = <&sysc R8A7742_PD_ALWAYS_ON>;
+ resets = <&cpg 407>;
+ };
+
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;