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authorRitesh Harjani <riteshh@codeaurora.org>2016-11-21 09:37:14 +0300
committerAndy Gross <andy.gross@linaro.org>2016-11-24 09:31:02 +0300
commita91b2e690d409476d711523be8a83062b9083fb2 (patch)
tree86e24e088c45bf80d9c7d6be88ede3cc39b962b3 /arch/arm/boot/dts/qcom-msm8974.dtsi
parentd4714a5ab2132e899a531bcd267bd13555244927 (diff)
downloadlinux-a91b2e690d409476d711523be8a83062b9083fb2.tar.xz
ARM: dts: Add xo to sdhc clock node on qcom platforms
Add xo entry to sdhc clock node on all qcom platforms. Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi16
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d2109475bdfd..49d579f28865 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -220,13 +220,13 @@
};
clocks {
- xo_board {
+ xo_board: xo_board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
- sleep_clk {
+ sleep_clk: sleep_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
@@ -558,8 +558,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 123 0>, <0 138 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};
@@ -569,8 +571,10 @@
reg-names = "hc_mem", "core_mem";
interrupts = <0 125 0>, <0 221 0>;
interrupt-names = "hc_irq", "pwr_irq";
- clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
- clock-names = "core", "iface";
+ clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&xo_board>;
+ clock-names = "core", "iface", "xo";
status = "disabled";
};