diff options
author | Kumar Gala <galak@codeaurora.org> | 2014-01-24 00:09:54 +0400 |
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committer | Kumar Gala <galak@codeaurora.org> | 2014-02-03 23:43:34 +0400 |
commit | cc60a1a4d47a4dea2ca04bad6f16bf43dcd5c1d6 (patch) | |
tree | b4bda1e7240515ac852b8ebbd7fc5692f90a70ba /arch/arm/boot/dts/qcom-msm8660-surf.dts | |
parent | 38dbfb59d1175ef458d006556061adeaa8751b72 (diff) | |
download | linux-cc60a1a4d47a4dea2ca04bad6f16bf43dcd5c1d6.tar.xz |
ARM: dts: msm: split out msm8660 and msm8960 soc into dts include
Pull the SoC device tree bits into their own files so other boards based
on these SoCs can include them and reduce duplication across a number of
boards.
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8660-surf.dts')
-rw-r--r-- | arch/arm/boot/dts/qcom-msm8660-surf.dts | 59 |
1 files changed, 1 insertions, 58 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8660-surf.dts b/arch/arm/boot/dts/qcom-msm8660-surf.dts index 68a72f5507b9..169bad90dac9 100644 --- a/arch/arm/boot/dts/qcom-msm8660-surf.dts +++ b/arch/arm/boot/dts/qcom-msm8660-surf.dts @@ -1,63 +1,6 @@ -/dts-v1/; - -/include/ "skeleton.dtsi" - -#include <dt-bindings/clock/qcom,gcc-msm8660.h> +#include "qcom-msm8660.dtsi" / { model = "Qualcomm MSM8660 SURF"; compatible = "qcom,msm8660-surf", "qcom,msm8660"; - interrupt-parent = <&intc>; - - intc: interrupt-controller@2080000 { - compatible = "qcom,msm-8660-qgic"; - interrupt-controller; - #interrupt-cells = <3>; - reg = < 0x02080000 0x1000 >, - < 0x02081000 0x1000 >; - }; - - timer@2000000 { - compatible = "qcom,scss-timer", "qcom,msm-timer"; - interrupts = <1 0 0x301>, - <1 1 0x301>, - <1 2 0x301>; - reg = <0x02000000 0x100>; - clock-frequency = <27000000>, - <32768>; - cpu-offset = <0x40000>; - }; - - msmgpio: gpio@800000 { - compatible = "qcom,msm-gpio"; - reg = <0x00800000 0x4000>; - gpio-controller; - #gpio-cells = <2>; - ngpio = <173>; - interrupts = <0 16 0x4>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gcc: clock-controller@900000 { - compatible = "qcom,gcc-msm8660"; - #clock-cells = <1>; - #reset-cells = <1>; - reg = <0x900000 0x4000>; - }; - - serial@19c40000 { - compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; - reg = <0x19c40000 0x1000>, - <0x19c00000 0x1000>; - interrupts = <0 195 0x0>; - clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>; - clock-names = "core", "iface"; - }; - - qcom,ssbi@500000 { - compatible = "qcom,ssbi"; - reg = <0x500000 0x1000>; - qcom,controller-type = "pmic-arbiter"; - }; }; |