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| author | Olof Johansson <olof@lixom.net> | 2014-09-24 09:26:19 +0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2014-09-24 09:26:28 +0400 |
| commit | 5f0798ce4a88e8f787c67f5265d77fc6428e2c88 (patch) | |
| tree | 76566587fcad0ac96c06dbccf96dfdf27ecf2634 /arch/arm/boot/dts/qcom-apq8064.dtsi | |
| parent | 007c7fdbdfbb532c1af84770782898e2f7115007 (diff) | |
| parent | aabff7bfe55afd01d71a5f11d4a84bd873c20f5e (diff) | |
| download | linux-5f0798ce4a88e8f787c67f5265d77fc6428e2c88.tar.xz | |
Merge tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/dt
Merge "qcom DT changes for v3.18-2" from Kumar Gala:
Qualcomm ARM Based Device Tree Updates for v3.18-2
* Added SDCC nodes on MSM8960/CDP and MSM8660/SURF
* Added I2C and SDCC4/WLAN on APQ8064/IFC6410
* Added I2C on MSM8984/DB8074
* tag 'qcom-dt-for-3.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
ARM: DT: msm8960: Add sdcc nodes
ARM: DT: msm8660: Add sdcc nodes
ARM: DT: apq8064: Add i2c device nodes
ARM: DT: apq8064: add support to sdcc4 for wlan.
ARM: dts: qcom: Add I2C dt node for MSM8974 and DB8074 board
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/qcom-apq8064.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/qcom-apq8064.dtsi | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index b1e476ac5edf..b3154c071652 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -85,6 +85,13 @@ pinctrl-names = "default"; pinctrl-0 = <&ps_hold>; + sdc4_gpios: sdc4-gpios { + pios { + pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68"; + function = "sdc4"; + }; + }; + ps_hold: ps_hold { mux { pins = "gpio78"; @@ -156,6 +163,48 @@ regulator; }; + gsbi1: gsbi@12440000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x12440000 0x100>; + clocks = <&gcc GSBI1_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + i2c1: i2c@12460000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x12460000 0x1000>; + interrupts = <0 194 IRQ_TYPE_NONE>; + clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + gsbi2: gsbi@12480000 { + status = "disabled"; + compatible = "qcom,gsbi-v1.0.0"; + reg = <0x12480000 0x100>; + clocks = <&gcc GSBI2_H_CLK>; + clock-names = "iface"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + i2c2: i2c@124a0000 { + compatible = "qcom,i2c-qup-v1.1.1"; + reg = <0x124a0000 0x1000>; + interrupts = <0 196 IRQ_TYPE_NONE>; + clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>; + clock-names = "core", "iface"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + gsbi7: gsbi@16600000 { status = "disabled"; compatible = "qcom,gsbi-v1.0.0"; @@ -226,6 +275,16 @@ qcom,ee = <0>; }; + sdcc4bam:dma@121c2000{ + compatible = "qcom,bam-v1.3.0"; + reg = <0x121c2000 0x8000>; + interrupts = <0 95 0>; + clocks = <&gcc SDC4_H_CLK>; + clock-names = "bam_clk"; + #dma-cells = <1>; + qcom,ee = <0>; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <1>; @@ -268,6 +327,27 @@ dmas = <&sdcc3bam 2>, <&sdcc3bam 1>; dma-names = "tx", "rx"; }; + + sdcc4: sdcc@121c0000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; + reg = <0x121c0000 0x2000>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "cmd_irq"; + clocks = <&gcc SDC4_CLK>, <&gcc SDC4_H_CLK>; + clock-names = "mclk", "apb_pclk"; + bus-width = <4>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <48000000>; + vmmc-supply = <&vsdcc_fixed>; + vqmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc4bam 2>, <&sdcc4bam 1>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + pinctrl-0 = <&sdc4_gpios>; + }; }; }; }; |