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authorRoger Quadros <rogerq@ti.com>2013-09-24 12:53:53 +0400
committerBenoit Cousson <bcousson@baylibre.com>2013-10-11 23:06:35 +0400
commit8ae9b5953c811ea733080194373e56d8a8ef559c (patch)
tree2059368e64672490ae85370bf94ac15d6cc22f71 /arch/arm/boot/dts/omap5-uevm.dts
parent4cbdc86d6386765345e0934db256e257c0ef853f (diff)
downloadlinux-8ae9b5953c811ea733080194373e56d8a8ef559c.tar.xz
ARM: dts: omap5-uevm: Use reset-gpios for hsusb2/3_reset
We no longer need to model the RESET line as a regulator since the USB phy-nop driver accepts "reset-gpios" property. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/omap5-uevm.dts')
-rw-r--r--arch/arm/boot/dts/omap5-uevm.dts26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts
index da25a14d919f..748f6bfbeef6 100644
--- a/arch/arm/boot/dts/omap5-uevm.dts
+++ b/arch/arm/boot/dts/omap5-uevm.dts
@@ -27,21 +27,10 @@
regulator-max-microvolt = <3000000>;
};
- /* HS USB Port 2 RESET */
- hsusb2_reset: hsusb2_reset_reg {
- compatible = "regulator-fixed";
- regulator-name = "hsusb2_reset";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
- reset-supply = <&hsusb2_reset>;
+ reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */
/**
* FIXME
* Put the right clock phandle here when available
@@ -51,21 +40,10 @@
clock-frequency = <19200000>;
};
- /* HS USB Port 3 RESET */
- hsusb3_reset: hsusb3_reset_reg {
- compatible = "regulator-fixed";
- regulator-name = "hsusb3_reset";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
- startup-delay-us = <70000>;
- enable-active-high;
- };
-
/* HS USB Host PHY on PORT 3 */
hsusb3_phy: hsusb3_phy {
compatible = "usb-nop-xceiv";
- reset-supply = <&hsusb3_reset>;
+ reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
};
leds {