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| author | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-11-26 12:27:01 +0300 |
|---|---|---|
| committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2019-11-26 12:27:01 +0300 |
| commit | c48b90f84a11ddcd6fee133c4929d8da037667ac (patch) | |
| tree | 1f31cc4961ce70e11aeb450f87ffe139dc83f981 /arch/arm/boot/dts/omap36xx.dtsi | |
| parent | 62214039525a621aa0eca3fe9160e809ec0e45d3 (diff) | |
| parent | 46770be0cf94149ca48be87719bda1d951066644 (diff) | |
| download | linux-c48b90f84a11ddcd6fee133c4929d8da037667ac.tar.xz | |
Merge branch 'pm-cpufreq'
* pm-cpufreq: (23 commits)
cpufreq: Register drivers only after CPU devices have been registered
cpufreq: Add NULL checks to show() and store() methods of cpufreq
cpufreq: intel_pstate: Fix plain int as pointer warning from sparse
cpufreq: sun50i: Fix CPU speed bin detection
cpufreq: powernv: fix stack bloat and hard limit on number of CPUs
cpufreq: Clarify the comment in cpufreq_set_policy()
cpufreq: vexpress-spc: find and skip duplicates when merging frequencies
cpufreq: vexpress-spc: use macros instead of hardcoded values for cluster ids
cpufreq: s3c64xx: Remove pointless NULL check in s3c64xx_cpufreq_driver_init
cpufreq: imx-cpufreq-dt: Correct i.MX8MN's default speed grade value
cpufreq: vexpress-spc: fix some coding style issues
cpufreq: vexpress-spc: remove lots of debug messages
cpufreq: vexpress-spc: drop unnessary cpufreq_arm_bL_ops abstraction
cpufreq: merge arm_big_little and vexpress-spc
cpufreq: scpi: remove stale/outdated comment about the driver
ARM: dts: Add OPP-V2 table for AM3517
cpufreq: ti-cpufreq: Add support for AM3517
ARM: dts: omap36xx: using OPP1G needs to control the abb_ldo
cpufreq: ti-cpufreq: omap36xx use "cpu0","vbb" if run in multi_regulator mode
ARM: dts: omap3: bulk convert compatible to be explicitly ti,omap3430 or ti,omap3630 or ti,am3517
...
Diffstat (limited to 'arch/arm/boot/dts/omap36xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap36xx.dtsi | 65 |
1 files changed, 57 insertions, 8 deletions
diff --git a/arch/arm/boot/dts/omap36xx.dtsi b/arch/arm/boot/dts/omap36xx.dtsi index 1e552f08f120..c618cb257d00 100644 --- a/arch/arm/boot/dts/omap36xx.dtsi +++ b/arch/arm/boot/dts/omap36xx.dtsi @@ -19,16 +19,65 @@ }; cpus { - /* OMAP3630/OMAP37xx 'standard device' variants OPP50 to OPP130 */ + /* OMAP3630/OMAP37xx variants OPP50 to OPP130 and OPP1G */ cpu: cpu@0 { - operating-points = < - /* kHz uV */ - 300000 1012500 - 600000 1200000 - 800000 1325000 - >; - clock-latency = <300000>; /* From legacy driver */ + operating-points-v2 = <&cpu0_opp_table>; + + vbb-supply = <&abb_mpu_iva>; + clock-latency = <300000>; /* From omap-cpufreq driver */ + }; + }; + + /* see Documentation/devicetree/bindings/opp/opp.txt */ + cpu0_opp_table: opp-table { + compatible = "operating-points-v2-ti-cpu"; + syscon = <&scm_conf>; + + opp50-300000000 { + opp-hz = /bits/ 64 <300000000>; + /* + * we currently only select the max voltage from table + * Table 4-19 of the DM3730 Data sheet (SPRS685B) + * Format is: cpu0-supply: <target min max> + * vbb-supply: <target min max> + */ + opp-microvolt = <1012500 1012500 1012500>, + <1012500 1012500 1012500>; + /* + * first value is silicon revision bit mask + * second one is "speed binned" bit mask + */ + opp-supported-hw = <0xffffffff 3>; + opp-suspend; + }; + + opp100-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1200000 1200000 1200000>, + <1200000 1200000 1200000>; + opp-supported-hw = <0xffffffff 3>; + }; + + opp130-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt = <1325000 1325000 1325000>, + <1325000 1325000 1325000>; + opp-supported-hw = <0xffffffff 3>; }; + + opp1g-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1375000 1375000 1375000>, + <1375000 1375000 1375000>; + /* only on am/dm37x with speed-binned bit set */ + opp-supported-hw = <0xffffffff 2>; + turbo-mode; + }; + }; + + opp_supply_mpu_iva: opp_supply { + compatible = "ti,omap-opp-supply"; + ti,absolute-max-voltage-uv = <1375000>; }; ocp@68000000 { |