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| author | Chanwoo Choi <cw00.choi@samsung.com> | 2016-04-11 06:57:53 +0300 |
|---|---|---|
| committer | Krzysztof Kozlowski <k.kozlowski@samsung.com> | 2016-05-03 13:22:57 +0300 |
| commit | aa99564d91a577538c1c6b9aea1fbc32769b38cd (patch) | |
| tree | e101779cdf0f415498ccbbc77f8abf3ee029dce3 /arch/arm/boot/dts/omap3-n950.dts | |
| parent | 266bdc5d61ea79357a7c55b51bf6697a82c5b44c (diff) | |
| download | linux-aa99564d91a577538c1c6b9aea1fbc32769b38cd.tar.xz | |
ARM: dts: exynos: Add bus nodes using VDD_INT for Exynos4x12
This patch adds the bus nodes using VDD_INT for Exynos4x12 SoC.
Exynos4x12 has the following AXI buses to translate data between
DRAM and sub-blocks.
Following list specifies the detailed relation between DRAM and sub-blocks:
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD
: The minimum clock of ACLK160 should be over 160MHz.
When drop the clock under 160MHz, show the broken image.
- ACLK133 clock for FSYS
- GDL clock for LEFTBUS
- GDR clock for RIGHTBUS
- SCLK_MFC clock for MFC
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[m.reichl and linux.amoon: Tested it on exynos4412-odroidu3 board]
Tested-by: Markus Reichl <m.reichl@fivetechno.de>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-n950.dts')
0 files changed, 0 insertions, 0 deletions