diff options
| author | Sebastian Reichel <sre@debian.org> | 2014-03-14 01:59:55 +0400 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2014-05-06 21:19:49 +0400 |
| commit | c1ad22069c20ade981235d727c151094ca78f30c (patch) | |
| tree | c78e78f00c1b7df0dc4f9d4017d40353c2f38d84 /arch/arm/boot/dts/omap3-n900.dts | |
| parent | 61d5924fa73e08c122a016a66322890938f46559 (diff) | |
| download | linux-c1ad22069c20ade981235d727c151094ca78f30c.tar.xz | |
ARM: dts: omap3-n900: Add WL1251 support
Add device tree support for the wireless chip
built into the Nokia N900.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-n900.dts')
| -rw-r--r-- | arch/arm/boot/dts/omap3-n900.dts | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts index 1a57b61f5e24..0a14a6baaddd 100644 --- a/arch/arm/boot/dts/omap3-n900.dts +++ b/arch/arm/boot/dts/omap3-n900.dts @@ -130,6 +130,15 @@ >; }; + mcspi4_pins: pinmux_mcspi4_pins { + pinctrl-single,pins = < + 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */ + 0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */ + 0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */ + 0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */ + >; + }; + mmc1_pins: pinmux_mmc1_pins { pinctrl-single,pins = < 0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */ @@ -173,6 +182,13 @@ 0x0da (PIN_OUTPUT | MUX_MODE1) /* dss_data23.sdi_clkn */ >; }; + + wl1251_pins: pinmux_wl1251 { + pinctrl-single,pins = < + 0x0ce (PIN_OUTPUT | MUX_MODE4) /* gpio 87 => wl1251 enable */ + 0x05a (PIN_INPUT | MUX_MODE4) /* gpio 42 => wl1251 irq */ + >; + }; }; &i2c1 { @@ -604,6 +620,30 @@ }; }; +&mcspi4 { + pinctrl-names = "default"; + pinctrl-0 = <&mcspi4_pins>; + + wl1251@0 { + pinctrl-names = "default"; + pinctrl-0 = <&wl1251_pins>; + + vio-supply = <&vio>; + + compatible = "ti,wl1251"; + reg = <0>; + spi-max-frequency = <48000000>; + + spi-cpol; + spi-cpha; + + ti,power-gpio = <&gpio3 23 GPIO_ACTIVE_HIGH>; /* 87 */ + + interrupt-parent = <&gpio2>; + interrupts = <10 IRQ_TYPE_NONE>; /* gpio line 42 */ + }; +}; + &usb_otg_hs { interface-type = <0>; usb-phy = <&usb2_phy>; |