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authorRoger Quadros <rogerq@ti.com>2016-04-07 13:25:40 +0300
committerTony Lindgren <tony@atomide.com>2016-04-13 00:32:02 +0300
commit4cb53a2308a96d97854b166780dace58737446ed (patch)
tree092e861062ea430afbe3bf939d463310b849c1e4 /arch/arm/boot/dts/omap3-beagle.dts
parent63015d73f345a9196e910b84c3f329a22556bcf4 (diff)
downloadlinux-4cb53a2308a96d97854b166780dace58737446ed.tar.xz
ARM: dts: omap3-beagle: Provide NAND ready pin
On these boards NAND ready pin status is avilable over GPMC_WAIT0 pin. For NAND we don't use GPMC wait pin monitoring but get the NAND Ready/Busy# status using GPIOlib. GPMC driver provides the WAIT0 pin status over GPIOlib. Read speed increases from 13212 KiB/ to 15753 KiB/s and write speed was unchanged at 4404 KiB/s. Measured using mtd_speedtest.ko on omap3-beagle-c4. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-beagle.dts')
-rw-r--r--arch/arm/boot/dts/omap3-beagle.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index 4602866792be..a4deff0e2d52 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -390,6 +390,7 @@
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
ti,nand-ecc-opt = "ham1";
+ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
nand-bus-width = <16>;
#address-cells = <1>;
#size-cells = <1>;