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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-07-26 18:01:32 +0400
committerBenoit Cousson <b-cousson@ti.com>2012-09-07 21:22:47 +0400
commit3f187f82948c236cfbc7df3783df50eedcf62d03 (patch)
treefa3e06e4a251112793bfbbd154e1ca1a66da711e /arch/arm/boot/dts/omap2430.dtsi
parent1c1737e5635d902e125394d7f66bccaf0f8c772c (diff)
downloadlinux-3f187f82948c236cfbc7df3783df50eedcf62d03.tar.xz
ARM: dts: omap2: Add McBSP entries for OMAP2420 and OMAP2430 SoC
The McBSP IP within OMAP2420 and 2430 is different we need to create separate dtsi files for them. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/omap2430.dtsi')
-rw-r--r--arch/arm/boot/dts/omap2430.dtsi83
1 files changed, 83 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap2430.dtsi b/arch/arm/boot/dts/omap2430.dtsi
new file mode 100644
index 000000000000..59a639a33794
--- /dev/null
+++ b/arch/arm/boot/dts/omap2430.dtsi
@@ -0,0 +1,83 @@
+/*
+ * Device Tree Source for OMAP243x SoC
+ *
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "omap2.dtsi"
+
+/ {
+ compatible = "ti,omap2430", "ti,omap2";
+
+ ocp {
+ mcbsp1: mcbsp@48074000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48074000 0xff>;
+ reg-names = "mpu";
+ interrupts = <64>, /* OCP compliant interrupt */
+ <59>, /* TX interrupt */
+ <60>, /* RX interrupt */
+ <61>; /* RX overflow interrupt */
+ interrupt-names = "common", "tx", "rx", "rx_overflow";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp1";
+ };
+
+ mcbsp2: mcbsp@48076000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48076000 0xff>;
+ reg-names = "mpu";
+ interrupts = <16>, /* OCP compliant interrupt */
+ <62>, /* TX interrupt */
+ <63>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp2";
+ };
+
+ mcbsp3: mcbsp@4808c000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x4808c000 0xff>;
+ reg-names = "mpu";
+ interrupts = <17>, /* OCP compliant interrupt */
+ <89>, /* TX interrupt */
+ <90>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp3";
+ };
+
+ mcbsp4: mcbsp@4808e000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x4808e000 0xff>;
+ reg-names = "mpu";
+ interrupts = <18>, /* OCP compliant interrupt */
+ <54>, /* TX interrupt */
+ <55>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp4";
+ };
+
+ mcbsp5: mcbsp@48096000 {
+ compatible = "ti,omap2430-mcbsp";
+ reg = <0x48096000 0xff>;
+ reg-names = "mpu";
+ interrupts = <19>, /* OCP compliant interrupt */
+ <81>, /* TX interrupt */
+ <82>; /* RX interrupt */
+ interrupt-names = "common", "tx", "rx";
+ interrupt-parent = <&intc>;
+ ti,buffer-size = <128>;
+ ti,hwmods = "mcbsp5";
+ };
+ };
+};