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| author | Javier Martinez Canillas <javier.martinez@collabora.co.uk> | 2014-09-13 19:47:22 +0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-09-13 19:47:22 +0400 |
| commit | 8be6a6d04ceae15de160ca4cbc0915baaee801e4 (patch) | |
| tree | ea6b6ea245b378d977f59f7677bf0ce168522be8 /arch/arm/boot/dts/mmp2.dtsi | |
| parent | dc0cf1a3ecd53c55aecd7182bce15843ca29c895 (diff) | |
| download | linux-8be6a6d04ceae15de160ca4cbc0915baaee801e4.tar.xz | |
ARM: dts: Set i2c7 clock at 400kHz for exynos based Peach boards
The downstream ChromeOS 3.8 kernel sets the clock frequency
for the I2C bus 7 at 400kHz. Do the same change in mainline.
Suggested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/boot/dts/mmp2.dtsi')
0 files changed, 0 insertions, 0 deletions