diff options
| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-07-27 15:12:55 +0300 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2019-08-06 00:38:07 +0300 |
| commit | 087a1d8b4e4cd0f84bde82e21bad83ea3d00a216 (patch) | |
| tree | 9902a65d40a8d0be3041565f7dcdcdf6b243e8ca /arch/arm/boot/dts/meson8b-ec100.dts | |
| parent | ea241bdfa0ba632416a828ddaa2fde33f30de530 (diff) | |
| download | linux-087a1d8b4e4cd0f84bde82e21bad83ea3d00a216.tar.xz | |
ARM: dts: meson8b: ec100: add the VDDEE regulator
The VDDEE regulator is basically a copy of the VCCK regulator. VDDEE
supplies for example the Mali GPU and is controlled by PWM_D instead of
PWM_C.
Add the VDDEE PWM regulator and make it the supply of the Mali GPU.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/boot/dts/meson8b-ec100.dts')
| -rw-r--r-- | arch/arm/boot/dts/meson8b-ec100.dts | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/meson8b-ec100.dts b/arch/arm/boot/dts/meson8b-ec100.dts index 96d239d8334e..bed1dfef1985 100644 --- a/arch/arm/boot/dts/meson8b-ec100.dts +++ b/arch/arm/boot/dts/meson8b-ec100.dts @@ -219,6 +219,27 @@ */ vin-supply = <&vcc_3v3>; }; + + vddee: regulator-vddee { + /* + * Silergy SY8089AAC-GP 2A continuous, 3A peak, 1MHz + * Synchronous Step Down Regulator. Also called VDDAO + * in a part of the schematics. + */ + compatible = "pwm-regulator"; + + regulator-name = "VDDEE"; + regulator-min-microvolt = <860000>; + regulator-max-microvolt = <1140000>; + + vin-supply = <&vcc_5v>; + + pwms = <&pwm_cd 1 1148 0>; + pwm-dutycycle-range = <100 0>; + + regulator-boot-on; + regulator-always-on; + }; }; &cpu0 { @@ -269,6 +290,10 @@ }; }; +&mali { + mali-supply = <&vddee>; +}; + &saradc { status = "okay"; vref-supply = <&vcc_1v8>; @@ -350,10 +375,10 @@ &pwm_cd { status = "okay"; - pinctrl-0 = <&pwm_c1_pins>; + pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>; pinctrl-names = "default"; - clocks = <&clkc CLKID_XTAL>; - clock-names = "clkin0"; + clocks = <&clkc CLKID_XTAL>, <&clkc CLKID_XTAL>; + clock-names = "clkin0", "clkin1"; }; &rtc { |