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authorJoachim Eastwood <manabian@gmail.com>2015-07-31 01:24:19 +0300
committerOlof Johansson <olof@lixom.net>2015-08-05 20:30:11 +0300
commit6d6d6b559f322183e5ca94908eac153a85a8b4a3 (patch)
tree392e29373b4680d8aec32114905fe0332e3cac83 /arch/arm/boot/dts/lpc18xx.dtsi
parentee224e175e9d837b3d572e863ac96109b58707ac (diff)
downloadlinux-6d6d6b559f322183e5ca94908eac153a85a8b4a3.tar.xz
ARM: dts: lpc18xx: add usb otg phy node
Add the USB OTG phy under the CREG syscon node and attach it to the USB0 EHCI controller. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/lpc18xx.dtsi')
-rw-r--r--arch/arm/boot/dts/lpc18xx.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc18xx.dtsi b/arch/arm/boot/dts/lpc18xx.dtsi
index c17b82cc2d4c..afd9d3b40eb1 100644
--- a/arch/arm/boot/dts/lpc18xx.dtsi
+++ b/arch/arm/boot/dts/lpc18xx.dtsi
@@ -83,6 +83,8 @@
reg = <0x40006100 0x100>;
interrupts = <8>;
clocks = <&ccu1 CLK_CPU_USB0>;
+ phys = <&usb0_otg_phy>;
+ phy-names = "usb";
has-transaction-translator;
status = "disabled";
};
@@ -109,6 +111,12 @@
compatible = "nxp,lpc1850-creg", "syscon", "simple-mfd";
reg = <0x40043000 0x1000>;
clocks = <&ccu1 CLK_CPU_CREG>;
+
+ usb0_otg_phy: phy@004 {
+ compatible = "nxp,lpc1850-usb-otg-phy";
+ clocks = <&ccu1 CLK_USB0>;
+ #phy-cells = <0>;
+ };
};
cgu: clock-controller@40050000 {