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authorShengjiu Wang <shengjiu.wang@freescale.com>2014-09-09 13:13:26 +0400
committerShawn Guo <shawn.guo@freescale.com>2014-09-16 06:27:17 +0400
commit935632e9938e3e286b9c62a7e54d35c428533cc9 (patch)
treeb79832c62e510b81e7b5f5f1ae0978b94f1c67e7 /arch/arm/boot/dts/imx6qdl.dtsi
parent9a060c1a3bb8f5f3940ddb82cb7aa76a843b96cc (diff)
downloadlinux-935632e9938e3e286b9c62a7e54d35c428533cc9.tar.xz
ARM: dts: imx6qdl: add baud clock and clock-names for ssi
Baud clock is used for bit clock generation in master mode. Ipg clock is peripheral clock and peripheral access clock. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl.dtsi12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 70d7207d494d..0de8806222cb 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -280,7 +280,9 @@
"fsl,imx51-ssi";
reg = <0x02028000 0x4000>;
interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_SSI1_IPG>;
+ clocks = <&clks IMX6QDL_CLK_SSI1_IPG>,
+ <&clks IMX6QDL_CLK_SSI1>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 37 1 0>,
<&sdma 38 1 0>;
dma-names = "rx", "tx";
@@ -294,7 +296,9 @@
"fsl,imx51-ssi";
reg = <0x0202c000 0x4000>;
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_SSI2_IPG>;
+ clocks = <&clks IMX6QDL_CLK_SSI2_IPG>,
+ <&clks IMX6QDL_CLK_SSI2>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 41 1 0>,
<&sdma 42 1 0>;
dma-names = "rx", "tx";
@@ -308,7 +312,9 @@
"fsl,imx51-ssi";
reg = <0x02030000 0x4000>;
interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks IMX6QDL_CLK_SSI3_IPG>;
+ clocks = <&clks IMX6QDL_CLK_SSI3_IPG>,
+ <&clks IMX6QDL_CLK_SSI3>;
+ clock-names = "ipg", "baud";
dmas = <&sdma 45 1 0>,
<&sdma 46 1 0>;
dma-names = "rx", "tx";