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| author | Peng Fan <peng.fan@nxp.com> | 2020-03-11 12:02:06 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-03-16 04:18:29 +0300 |
| commit | f5d35d87ef061172a25252b2b5402c972b16d3be (patch) | |
| tree | 1cd6ec8d5014a25e6ccd3efcaba1fddcbe8ec20f /arch/arm/boot/dts/imx6q.dtsi | |
| parent | 98670a0bb0ef14bbb3df8542e59e0e6106c0ba53 (diff) | |
| download | linux-f5d35d87ef061172a25252b2b5402c972b16d3be.tar.xz | |
ARM: dts: imx: add nvmem property for cpu0
Add nvmem related property for cpu0, then nvmem API could be used
to read cpu speed grading to avoid directly read OCOTP registers
mapped which could not handle defer probe.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 907cf8306645..78a4d64929f3 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -49,6 +49,8 @@ arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; cpu1: cpu@1 { |